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Re: [PATCH 2/2] x86, perf: Allow zero PEBS status with only single active event

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On Thu, Dec 03, 2015 at 01:22:20PM -0800, Andi Kleen wrote:
> +		/*
> +		 * On some CPUs the PEBS status can be zero when PEBS is
> +		 * racing with clearing of GLOBAL_STATUS.
> +		 *
> +		 * Normally we would drop that record, but in the
> +		 * case when there is only a single active PEBS event
> +		 * we can assume it's for that event.
> +		 */
> +		if (!pebs_status && cpuc->pebs_enabled &&
> +			!(cpuc->pebs_enabled & (cpuc->pebs_enabled-1)))
> +			pebs_status = cpuc->pebs_enabled;
> +
>  		bit = find_first_bit((unsigned long *)&pebs_status,
>  					x86_pmu.max_pebs_events);
>  		if (bit >= x86_pmu.max_pebs_events)


Ah! I think this is the comment I just asked for.


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[PATCH 2/2] x86, perf: Allow zero PEBS status with only single active event Andi Kleen <andi@firstfloor.org> - 2015-12-03 22:30 +0100
  Re: [PATCH 2/2] x86, perf: Allow zero PEBS status with only single  active event Peter Zijlstra <peterz@infradead.org> - 2015-12-03 22:30 +0100

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