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Groups > linux.kernel > #1225562
| From | Heiko Stübner <heiko@sntech.de> |
|---|---|
| Newsgroups | linux.kernel |
| Subject | Re: [PATCH 6/8] mmc: dw_mmc: Generic MMC tuning with the clock phase framework |
| Date | 2015-09-16 00:10 +0200 |
| Message-ID | <q96Ah-1Xc-1@gated-at.bofh.it> (permalink) |
| References | <q3C09-7l6-9@gated-at.bofh.it> <q3C0a-7l6-15@gated-at.bofh.it> <q8TMJ-7Ks-1@gated-at.bofh.it> |
| Organization | linux.* mail to news gateway |
Hi, Am Dienstag, 15. September 2015, 17:25:38 schrieb Jaehoon Chung: > On 09/01/2015 03:24 AM, Heiko Stuebner wrote: > > From: Alexandru M Stan <amstan@chromium.org> > > > > This algorithm will try 1 degree increments, since there's no way to tell > > what resolution the underlying phase code uses. As an added bonus, doing > > many tunings yields better results since some tests are run more than once > > (ex: if the underlying driver uses 45 degree increments, the tuning code > > will try the same angle more than once). > > > > It will then construct a list of good phase ranges (even ranges that cross > > 360/0), will pick the biggest range then it will set the sample_clk to the > > middle of that range. > > > > We do not touch ciu_drive (and by extension define default-drive-phase). > > Drive phase is mostly used to define minimum hold times, while one could > > write some code to determine what phase meets the minimum hold time (ex 10 > > degrees) this will not work with the current clock phase framework (which > > floors angles, so we'll get 0 deg, and there's no way to know what > > resolution the floors happen at). We assume that the default drive angles > > set by the hardware are good enough. > > > > If a device has device specific code (like exynos) then that will still > > take precedence, otherwise this new code will execute. If the device wants > > to tune, but has no sample_clk defined we'll return EIO with an error > > message. > > Which point is "_generic_"? I don't find the code that control the register > relevant to CLK_DRV/SMPL PHASE. It seems that posted the similar patches at > u-boot mailing list.. The "generic" part is that it uses the clk phase API for dw_mmc implementations where the clkgen controlling interface is outside the dw_mmc IP itself. So it's open for other implementations as well. But if you are more comfortable with it, I can also move it into the dw_mmc- rockchip variant for the time being, until another user comes along. Heiko -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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Re: [PATCH 6/8] mmc: dw_mmc: Generic MMC tuning with the clock phase framework Jaehoon Chung <jh80.chung@samsung.com> - 2015-09-15 10:30 +0200
Re: [PATCH 6/8] mmc: dw_mmc: Generic MMC tuning with the clock phase framework Heiko Stübner <heiko@sntech.de> - 2015-09-16 00:10 +0200
Re: [PATCH 6/8] mmc: dw_mmc: Generic MMC tuning with the clock phase framework Jaehoon Chung <jh80.chung@samsung.com> - 2015-09-16 04:40 +0200
Re: [PATCH 6/8] mmc: dw_mmc: Generic MMC tuning with the clock phase framework Heiko Stübner <heiko@sntech.de> - 2015-09-16 17:00 +0200
Re: [PATCH 6/8] mmc: dw_mmc: Generic MMC tuning with the clock phase framework Jaehoon Chung <jh80.chung@samsung.com> - 2015-09-17 04:10 +0200
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