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Re: [PATCH 0/6] pmem, dax: I/O path enhancements

From Dan Williams <dan.j.williams@intel.com>
Newsgroups linux.kernel
Subject Re: [PATCH 0/6] pmem, dax: I/O path enhancements
Date 2015-08-07 18:50 +0200
Message-ID <pUT0f-5e5-29@gated-at.bofh.it> (permalink)
References <pUxsJ-7Gk-5@gated-at.bofh.it>
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On Thu, Aug 6, 2015 at 10:43 AM, Ross Zwisler
<ross.zwisler@linux.intel.com> wrote:
> Patch 5 adds support for the "read flush" _DSM flag, allowing us to change the
> ND BLK aperture mapping from write-combining to write-back via memremap_pmem().
>
> Patch 6 updates the DAX I/O path so that all operations that store data (I/O
> writes, zeroing blocks, punching holes, etc.) properly synchronize the stores
> to media using the PMEM API.  This ensures that the data DAX is writing is
> durable on media before the operation completes.
>
> Patches 1-4 are cleanup patches and additions to the PMEM API that make
> patches 5 and 6 possible.
>
> Regarding the choice to add both flush_cache_pmem() and wb_cache_pmem() to the
> PMEM API, I had initially implemented flush_cache_pmem() as a generic function
> flush_io_cache_range() in the spirit of flush_cache_range(), etc., in
> cacheflush.h.  I eventually moved it into the PMEM API because a) it has a
> common and consistent use of the __pmem annotation, b) it has a clear fallback
> method for architectures that don't support it, as opposed to APIs in
> cacheflush.h which would need to be added individually to all other
> architectures.  It can be argued that the flush API could apply to other uses
> beyond PMEM such as flushing cache lines associated with other types of
> sliding MMIO windows.  At this point I'm inclined to have it as part of the
> PMEM API, and then take on the effort of making it a general cache flusing API
> if other users come along.

I'm not convinced.  There are already existing users for invalidating
a cpu cache and they currently jump through hoops to have cross-arch
flushing, see drm_clflush_pages().  What the NFIT-BLK driver brings to
the table is just one more instance where the cpu cache needs to be
invalidated, and for something so fundamental it is time we had a
cross arch generic helper.

The cache-writeback case is different.  To date we've only used
writeback for i/o-incoherent archs.  x86 now for the first time needs
(potentially) a writeback api specifically for guaranteeing
persistence.  I say "potentially" because all the cases where we need
to guarantee persistence could be handled with non-temporal stores.

The __pmem annotation is a separate issue that we need to tackle.  I
think Christoph is already on team "__pmem is a mistake", but I think
we should walk through what carrying it forward would look like.  The
__pfn_t patches allow for flags to be attached to the pfn(s) returned
from ->direct_access().  We could add a PFN_PMEM flag and teach
kmap_atomic_pfn_t() to only operate on !PFN_PMEM pfns.  A new
"kmap_atomic_pmem()" would be needed to map pfns from the pmem
driver's ->direct_access() and that would return "void __pmem *".  I
think this would force DAX to always be "__pmem clean" regardless of
whether we got the pfns from BRD or PMEM.  It becomes messy when we
consider carrying __pfn_t in a bio_vec.  But, I think it becomes messy
in precisely the right way in that drivers that want to setup
DMA-to-pmem should consciously be handling the __pmem annotation and
the resulting side effects.
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Thread

[PATCH 0/6] pmem, dax: I/O path enhancements Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-06 19:50 +0200
  [PATCH 4/6] pmem: Add wb_cache_pmem() and flush_cache_pmem() Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-06 19:50 +0200
  [PATCH 5/6] nd_blk: add support for "read flush" DSM flag Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-06 19:50 +0200
  [PATCH 2/6] x86: clean up conditional pmem includes Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-06 19:50 +0200
    Re: [PATCH 2/6] x86: clean up conditional pmem includes Christoph Hellwig <hch@infradead.org> - 2015-08-07 08:40 +0200
      Re: [PATCH 2/6] x86: clean up conditional pmem includes Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-07 16:10 +0200
  [PATCH 6/6] dax: update I/O path to do proper PMEM flushing Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-06 19:50 +0200
    Re: [PATCH 6/6] dax: update I/O path to do proper PMEM flushing Dave Chinner <david@fromorbit.com> - 2015-08-06 23:10 +0200
      Re: [PATCH 6/6] dax: update I/O path to do proper PMEM flushing Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-07 21:10 +0200
    Re: [PATCH 6/6] dax: update I/O path to do proper PMEM flushing Dan Williams <dan.j.williams@intel.com> - 2015-08-06 23:30 +0200
  [PATCH 1/6] pmem: remove indirection layer arch_has_pmem_api() Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-06 19:50 +0200
    Re: [PATCH 1/6] pmem: remove indirection layer arch_has_pmem_api() Christoph Hellwig <hch@infradead.org> - 2015-08-07 08:40 +0200
      Re: [PATCH 1/6] pmem: remove indirection layer arch_has_pmem_api() Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-07 16:10 +0200
    Re: [PATCH 1/6] pmem: remove indirection layer arch_has_pmem_api() Dan Williams <dan.j.williams@intel.com> - 2015-08-07 18:20 +0200
      Re: [PATCH 1/6] pmem: remove indirection layer arch_has_pmem_api() Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-07 20:50 +0200
        Re: [PATCH 1/6] pmem: remove indirection layer arch_has_pmem_api() Dan Williams <dan.j.williams@intel.com> - 2015-08-07 22:10 +0200
  Re: [PATCH 0/6] pmem, dax: I/O path enhancements Dan Williams <dan.j.williams@intel.com> - 2015-08-07 18:50 +0200
    Re: [PATCH 0/6] pmem, dax: I/O path enhancements Ross Zwisler <ross.zwisler@linux.intel.com> - 2015-08-07 21:10 +0200

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