Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll

From	Murali Karicheri <m-karicheri2@ti.com>
Newsgroups	linux.kernel
Subject	Re: [PATCH 1/2] clk: keystone: add support for post divider register for main pll
Date	2015-06-22 22:20 +0200
Message-ID	<pEgmd-5G2-15@gated-at.bofh.it> (permalink)
References	<pvv19-jr-49@gated-at.bofh.it> <pCQDv-5lG-11@gated-at.bofh.it> <pCQWS-5IJ-31@gated-at.bofh.it>
Organization	Texas Instruments

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On 06/18/2015 06:55 PM, santosh shilimkar wrote:
> On 6/18/2015 3:37 PM, Michael Turquette wrote:
>> Quoting Murali Karicheri (2015-05-29 09:04:12)
>>> Main PLL controller has post divider bits in a separate register in
>>> pll controller. Use the value from this register instead of fixed
>>> divider when available.
>>>
>>> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
>>
>> Applied to clk-next.
>>
> Thanks Mike !!
>
>
Thanks Mike.

Regards,

-- 
Murali Karicheri
Linux Kernel, Keystone

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Re: [PATCH 1/2] clk: keystone: add support for post divider register  for main pll Murali Karicheri <m-karicheri2@ti.com> - 2015-06-22 22:20 +0200

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