PCI-enum and SouthBridge behaviour...

From	"wolfgang kern" <nowhere@never.at>
Newsgroups	alt.os.development
Subject	PCI-enum and SouthBridge behaviour...
Date	2016-07-22 21:53 +0200
Organization	KESYS-development
Message-ID	<nmttk2$17sb$1@gioia.aioe.org> (permalink)

Show all headers | View raw

while I work on a new OS-version with most structures expanded 
and finally using UDMA for larger than disk-cache reads in the 
aspect of making all data-fields also usable within long mode, 
I figured a strange (yet for me unknown) BIOS behaviour:

when I boot from an IDE-connected drive and use BIOS calls like 
int11/12/14/17 (rather old and useless today anyway) I see 
much more PCI-devices (EHCI-USB, onboard SOUND and Bridges) 
than what I see if I boot from an SATA-drive with only a few 
BIOS calls (int15_e820,int10_0003,int13_4xxx).

the BIOS hide or just disable some PCI devices on the type of boot 
device? or is this any other BIOS function I havent seen so far ?

I can of course setup the (known by AMD southbridge docs) PCI-regs 
to reenable all expected PCI-devices, but why does BIOS disable it ?  

checked with and without USBtoPS/2 mouse-emulation yet, equal result.  
__
wolfgang

Back to alt.os.development | Previous | Next — Next in thread | Find similar | Unroll thread

Thread

PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-22 21:53 +0200
  Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-24 16:52 +0100
    Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-24 19:54 +0200
      Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-25 07:07 +0100
        Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-25 11:04 +0200
          Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-25 10:30 +0100
            Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-25 14:06 +0200
              Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-25 13:16 +0100
                Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-26 13:09 +0200
                Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-26 15:14 +0100
          Re: PCI-enum and SouthBridge behaviour... Rod Pemberton <NoHaveNotOne@bcczxcfrze.cam> - 2016-07-25 21:55 -0400
            Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-26 12:48 +0200
  Re: PCI-enum and SouthBridge behaviour... Rod Pemberton <NoHaveNotOne@bcczxcfrze.cam> - 2016-07-26 08:18 -0400
    Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-26 20:11 +0200
  Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-28 18:53 +0200
    Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-29 19:47 +0200
      Re: PCI-enum and SouthBridge behaviour... Rod Pemberton <NoHaveNotOne@zxdehrnyya.cam> - 2016-07-29 17:44 -0400
        Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-30 09:44 +0200
    Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-30 12:55 +0100
      Re: PCI-enum and SouthBridge behaviour... "wolfgang kern" <nowhere@never.at> - 2016-07-30 19:40 +0200
        Re: PCI-enum and SouthBridge behaviour... James Harris <james.harris.1@gmail.com> - 2016-07-30 19:08 +0100

csiph-web