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Re: W have to be smart

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Hello,


The PhD paper says about the benchmarks that gives 6x scalability that:


"The graph shows the average throughput in terms of
number of critical and non-critical section pairs executed per second.
The critical section accesses two distinct cache blocks (increments
4 integer counters on each block), and the non-critical section
is an idle spin loop of up to 4 microseconds."


So i think from the benchmark that the idle loop doen't count as
a serial part cause it is not a critical section and it doesn't affect
by much the Amdahl's law, so the critical section that  accesses
the two distinct cache blocks and increments 4 integer counters on each 
block will use ILP (instruction level parallelism) of the processor
to lower the amount of CPU clocks that it takes in the critical section
that means it will lower the time of serial part of the Amdahl's law, 
and the parallel part is when you enter the the local locks and this 
will take a number of CPU clocks, and i think this is what is giving the 
6x scaling with the Amdahl's law calculation, and what i want to explain 
is that it is not the mimization of the inter-socket coherence traffic 
that is giving the 6x scalability, but it's the Amdahl's law that is 
giving 6x scalability.



Thank you,
Amine Moulay Ramdane.

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W have to be smart Ramine <ramine@1.1> - 2014-11-18 18:41 -0800
  Re: W have to be smart Ramine <ramine@1.1> - 2014-11-18 19:10 -0800
  Re: W have to be smart Ramine <ramine@1.1> - 2014-11-18 19:46 -0800
    Re: W have to be smart Ramine <ramine@1.1> - 2014-11-18 20:02 -0800

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