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| From | timcaffrey@aol.com (Tim McCaffrey) |
|---|---|
| Newsgroups | comp.arch |
| Subject | Re: Q: bit shifting |
| Date | 2011-10-10 20:27 +0000 |
| Organization | Unisys Tredyffrin InterNetNews site |
| Message-ID | <j6vkel$htt$1@USTR-NEWS.TR.UNISYS.COM> (permalink) |
| References | (4 earlier) <7bq7m8-tvi1.ln1@ntp6.tmsw.no> <22053691.2482.1318188961201.JavaMail.geo-discussion-forums@yqnk41> <n5iam8-9pn1.ln1@ntp6.tmsw.no> <j6v346$5tq$1@USTR-NEWS.TR.UNISYS.COM> <28ibm8-6uo1.ln1@ntp6.tmsw.no> |
In article <28ibm8-6uo1.ln1@ntp6.tmsw.no>, "terje.mathisenattmsw.no" says... > >Tim McCaffrey wrote: >> In article<n5iam8-9pn1.ln1@ntp6.tmsw.no>, "terje.mathisenattmsw.no" says... >>> (It seems to me that having a 63 mask is _very_ _slightly_ cheaper than >>> a saturate_at_32, because the hw only has to look at a single bit >>> position (32) instead of OR'ing together the upper bits (32,64,128).) >>> >>> No crying over spilt milk, right? >> >> Well, no, what if CL = 65? > >With masking that gives you a count of 1, saturation gives you 32. > >With 64-bit regs the mask should not be lower than 127, at which point >the hw will almost certainly saturate the count at 64 anyway. Well, I'm thinking of this from a more generic model, where the saturation would be correct in all cases, and masking a bigger number would be correct in only the "closer to boundary" conditions. What if your definition of shift (not C's definition) says you need to implement saturation? (For some algorithmic reason). Then no matter how big the mask is, it is still a mask and you have to add an explicit check into your code to do the saturate check (even only using CL (instead of ECX/RCX) is a possible problem. Well, doesn't matter, nobody is going to change the instruction set now... >> >> Yes, Haswell (or is it Ivy Bridge?) has GP register shift instructions that >> don't modify the flags. The instruction I wish Intel would include in >> Haswell is the Packed Rotate that is in AMD's BD2 XOP set. > >Hmmm, I haven't seen that one... > >OK, VPROT[B/W/D/Q] does vector rotates of 8/16/32/64 bit elements, >without specifying the direction! Left or right? <snip> I don't know, but hopefully if it sees the light of day it will be obvious :) The fact that it exists lets me get rid of possibly 4 instructions per usage (and free a register) vs. SSE3. (2 instructions for AVX). - Tim
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Q: bit shifting Mok-Kong Shen <mok-kong.shen@t-online.de> - 2011-10-07 13:31 +0200
Re: Q: bit shifting nmm1@cam.ac.uk - 2011-10-07 12:17 +0100
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-07 17:35 +0200
Re: Q: bit shifting Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-10-07 09:31 -0700
Re: Q: bit shifting nmm1@cam.ac.uk - 2011-10-07 17:16 +0100
Re: Q: bit shifting Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-10-07 23:13 -0700
Re: Q: bit shifting nmm1@cam.ac.uk - 2011-10-08 09:56 +0100
Re: Q: bit shifting Andrew Reilly <areilly---@bigpond.net.au> - 2011-10-08 21:28 +0000
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-11 15:05 +0000
Re: Q: bit shifting Sean Case <seancase@tpg.com.au> - 2011-10-16 23:15 +1000
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-19 20:12 +0000
Re: Q: bit shifting Robert Wessel <robertwessel2@yahoo.com> - 2011-10-07 12:24 -0500
Re: Q: bit shifting Kai Harrekilde-Petersen <khp@harrekilde.dk> - 2011-10-07 19:27 +0200
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-08 10:41 +0200
Re: Q: bit shifting Kai Harrekilde-Petersen <khp@harrekilde.dk> - 2011-10-08 11:28 +0200
Re: Q: bit shifting Andrew Reilly <areilly---@bigpond.net.au> - 2011-10-08 21:38 +0000
Re: Q: bit shifting Robert Wessel <robertwessel2@yahoo.com> - 2011-10-08 22:57 -0500
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-09 08:18 +0200
Re: Q: bit shifting Mok-Kong Shen <mok-kong.shen@t-online.de> - 2011-10-19 15:08 +0200
Re: Q: bit shifting Michael S <already5chosen@yahoo.com> - 2011-10-11 16:41 -0700
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-12 07:55 +0200
Re: Q: bit shifting MitchAlsup <MitchAlsup@aol.com> - 2011-10-12 10:21 -0700
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-12 21:22 +0200
Re: Q: bit shifting kenney@cix.compulink.co.uk - 2011-10-13 11:00 -0500
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-13 20:32 +0200
Re: Q: bit shifting Mike Hore <mike_horeREM@OVE.invalid.aapt.net.au> - 2011-10-11 17:08 +1100
Re: Q: bit shifting MitchAlsup <MitchAlsup@aol.com> - 2011-10-07 12:49 -0700
Re: Q: bit shifting nmm1@cam.ac.uk - 2011-10-07 21:20 +0100
The word is devolving into 3 architectures (NOT?) "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-10-07 19:48 -0700
Re: The word is devolving into 3 architectures (NOT?) Mark Thorson <nospam@sonic.net> - 2011-10-07 19:56 -0800
Re: The word is devolving into 3 architectures (NOT?) "Skybuck Flying" <Windows7IsOK@DreamPC2006.com> - 2011-10-08 04:53 +0200
Re: The word is devolving into 3 architectures (NOT?) anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2011-10-08 17:26 +0000
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-08 10:47 +0200
Re: Q: bit shifting MitchAlsup <MitchAlsup@aol.com> - 2011-10-08 12:27 -0700
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-09 08:07 +0200
Re: Q: bit shifting MitchAlsup <MitchAlsup@aol.com> - 2011-10-09 12:36 -0700
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-10 09:06 +0200
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-10 15:31 +0000
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-10 18:13 +0200
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-10 20:27 +0000
Re: Q: bit shifting Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-10-10 23:45 +0200
Re: Q: bit shifting Robert Wessel <robertwessel2@yahoo.com> - 2011-10-10 17:32 -0500
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-11 14:58 +0000
Re: Q: bit shifting Robert Wessel <robertwessel2@yahoo.com> - 2011-10-11 11:30 -0500
Re: Q: bit shifting "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-10-11 10:05 -0700
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-11 17:59 +0000
Re: Q: bit shifting timcaffrey@aol.com (Tim McCaffrey) - 2011-10-11 18:00 +0000
Re: Q: bit shifting Al Grant <algrant@myrealbox.com> - 2011-10-11 13:49 -0700
Re: Q: bit shifting Al Grant <algrant@myrealbox.com> - 2011-10-11 14:18 -0700
Re: Q: bit shifting Robert Wessel <robertwessel2@yahoo.com> - 2011-10-11 16:03 -0500
Re: Q: bit shifting MitchAlsup <MitchAlsup@aol.com> - 2011-10-10 09:52 -0700
Re: Q: bit shifting anton@mips.complang.tuwien.ac.at (Anton Ertl) - 2011-10-09 12:24 +0000
Re: Q: bit shifting nmm1@cam.ac.uk - 2011-10-09 13:13 +0100
Re: Q: bit shifting Quadibloc <jsavard@ecn.ab.ca> - 2011-10-09 10:11 -0700
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