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Groups > alt.folklore.computers > #159867

Re: Delay Line Memory

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On Thu, 18 Feb 2016, Jon Elson wrote:

> isw wrote:
>
>
>>
>> A serial shift register is just a long string of D-type flip-flops. No
>> real "addressing" needed, just a counter. Plus, in the days when a lot
>> of chips were laid out *by hand*, a very simple step-and-repeat was very
>> appealing.
> Actually, creating a full-screen (1920 bytes) memory out of D-flops would be
> prohibitive.  Assuming you only needed 6 bits per character, that is still
> 11520 bits, or 1920 chips of 6-wide D-flops.  When these things were built,
> 2 FF/chip was the max, so that would be 5000 IC packages!  Obviously, not
> practical.
>
There were "quad latches" like the 7475 to go between counters and BCD to 
7 segment decoders, needed when the counter was otherwise always counting. 
I can't remember if the pinout allowed the four flip-flops to be used as a 
shift register, but if it could, that would improve density 2:1.  Later 
(but of course by then nobody was using shift registers for memory), you 
could get 8 latches in the same package, to latch an 8bit bus.

    Michael

> The Beehive monster I cloned used the 1404 chip, available from Intel and
> AMD.  1024 bits by CCD bucket-brigade technology.  It needed only 14 of
> these chips to hold 2048 7-bit characters.  (the screen only displayed 1920
> in that particular unit.)
>
> Jon
>

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Delay Line Memory "Charles Richmond" <numerist@aquaporin4.com> - 2016-02-16 15:21 -0600
  Re: Delay Line Memory Dave Garland <dave.garland@wizinfo.com> - 2016-02-16 15:41 -0600
  Re: Delay Line Memory David Wade <dave.g4ugm@gmail.com> - 2016-02-16 22:18 +0000
  Re: Delay Line Memory Dan Espen <despen@verizon.net> - 2016-02-16 17:36 -0500
  Re: Delay Line Memory Lawrence Statton <lawrence@senguio.mx> - 2016-02-16 16:57 -0600
  Re: Delay Line Memory bert <bert.hutchings@btinternet.com> - 2016-02-16 15:08 -0800
    Re: Delay Line Memory Bob Eager <news0006@eager.cx> - 2016-02-17 01:31 +0000
    Re: Delay Line Memory Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2016-02-17 03:42 +0000
  Re: Delay Line Memory Morten Reistad <first@last.name.invalid> - 2016-02-17 00:25 +0100
    Re: Delay Line Memory Elliott Roper <nospam@yrl.co.uk> - 2016-02-17 14:03 +0000
  Re: Delay Line Memory Anonymous <no_email@invalid.invalid> - 2016-02-17 00:14 +0000
    Re: Delay Line Memory Quadibloc <jsavard@ecn.ab.ca> - 2016-02-17 11:46 -0800
      Re: Delay Line Memory jhhaynes@earthlink.net - 2016-02-17 18:18 -0800
      Re: Delay Line Memory David Wade <dave.g4ugm@gmail.com> - 2016-02-18 09:44 +0000
  Re: Delay Line Memory hancock4@bbs.cpcn.com - 2016-02-16 16:43 -0800
    Re: Delay Line Memory Anonymous <no_email@invalid.invalid> - 2016-02-17 01:24 +0000
    Re: Delay Line Memory Peter Flass <peter_flass@yahoo.com> - 2016-02-16 18:52 -0700
      Re: Delay Line Memory Michael Black <et472@ncf.ca> - 2016-02-16 22:19 -0500
      Re: Delay Line Memory JimP <solosam90@gmail.com> - 2016-02-17 11:34 -0600
    Re: Delay Line Memory Dave Garland <dave.garland@wizinfo.com> - 2016-02-16 20:06 -0600
    Re: Delay Line Memory Lawrence Statton <lawrence@senguio.mx> - 2016-02-16 20:23 -0600
    Re: Delay Line Memory "hgww" <hgww@gmail.com> - 2016-02-17 14:35 +1100
    Re: Delay Line Memory Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2016-02-17 04:17 +0000
      Re: Delay Line Memory "Charles Richmond" <numerist@aquaporin4.com> - 2016-02-18 17:14 -0600
        Re: Delay Line Memory Lawrence Statton <lawrence@senguio.mx> - 2016-02-18 19:27 -0600
          Re: Delay Line Memory Charlie Gibbs <cgibbs@kltpzyxm.invalid> - 2016-02-19 04:14 +0000
          Re: Delay Line Memory Michael Black <et472@ncf.ca> - 2016-02-19 19:07 -0500
  Re: Delay Line Memory Bob Eager <news0006@eager.cx> - 2016-02-17 01:30 +0000
    Re: Delay Line Memory "Joe Morris" <j.c.morris@verizon.net> - 2016-02-17 19:11 -0500
      Re: Delay Line Memory Michael Black <et472@ncf.ca> - 2016-02-17 23:13 -0500
        Re: Delay Line Memory Jon Elson <elson@pico-systems.com> - 2016-02-17 22:25 -0600
        Re: Delay Line Memory isw <isw@witzend.com> - 2016-02-17 23:16 -0800
          Re: Delay Line Memory Jon Elson <elson@pico-systems.com> - 2016-02-18 12:01 -0600
            Re: Delay Line Memory Jon Elson <elson@pico-systems.com> - 2016-02-18 12:10 -0600
            Re: Delay Line Memory Lawrence Statton <lawrence@senguio.mx> - 2016-02-18 13:46 -0600
            Re: Delay Line Memory Michael Black <et472@ncf.ca> - 2016-02-19 19:13 -0500
        Re: Delay Line Memory Quadibloc <jsavard@ecn.ab.ca> - 2016-02-18 04:49 -0800
          Re: Delay Line Memory Michael Black <et472@ncf.ca> - 2016-02-19 19:21 -0500
        Re: Delay Line Memory Quadibloc <jsavard@ecn.ab.ca> - 2016-02-18 04:51 -0800
          Re: Delay Line Memory Michael Black <et472@ncf.ca> - 2016-02-19 19:16 -0500
  Re: Delay Line Memory Peter Flass <peter_flass@yahoo.com> - 2016-02-16 18:52 -0700
    Re: Delay Line Memory "Charles Richmond" <numerist@aquaporin4.com> - 2016-02-19 20:50 -0600
      Re: Delay Line Memory Ahem A Rivet's Shot <steveo@eircom.net> - 2016-02-20 06:31 +0000
  Re: Delay Line Memory G. <gerry77@no.spam.mail.com> - 2016-02-17 04:08 +0100
  Re: Delay Line Memory Stan Barr <plan.b@bluesomatic.org> - 2016-02-17 08:19 +0000
    Re: Delay Line Memory Jon Elson <jmelson@wustl.edu> - 2016-02-17 14:57 -0600
    Re: Delay Line Memory "Charles Richmond" <numerist@aquaporin4.com> - 2016-02-19 20:43 -0600
      Re: Delay Line Memory isw <isw@witzend.com> - 2016-02-19 22:13 -0800
      Re: Delay Line Memory Stan Barr <plan.b@bluesomatic.org> - 2016-02-20 08:17 +0000
      Re: Delay Line Memory Lawrence Statton <lawrence@senguio.mx> - 2016-02-20 09:17 -0600
        Re: Delay Line Memory Lawrence Statton <lawrence@senguio.mx> - 2016-02-20 09:20 -0600
      Re: Delay Line Memory Quadibloc <jsavard@ecn.ab.ca> - 2016-02-20 18:49 -0800
        Re: Delay Line Memory isw <isw@witzend.com> - 2016-02-20 21:06 -0800
  Re: Delay Line Memory jhhaynes@earthlink.net - 2016-02-17 18:23 -0800
    Re: Delay Line Memory isw <isw@witzend.com> - 2016-02-17 23:06 -0800

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