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| From | jmfbahciv <See.above@aol.com> |
|---|---|
| Newsgroups | comp.arch, alt.folklore.computers |
| Subject | Re: Solving the Floating-Point Goldilocks Problem! |
| Date | 2011-09-05 13:26 +0000 |
| Organization | "Have EDDT, will travel" |
| Message-ID | <PM0004AC31D726FFED@aca2b024.ipt.aol.com> (permalink) |
| References | (8 earlier) <PM0004ABE18AD7D78B@aca343ef.ipt.aol.com> <4E610639.1060200@SPAM.comp-arch.net> <PM0004AC0AC5FEAC96@aca221f7.ipt.aol.com> <j3tn7c$3si$1@dont-email.me> <uJWdnVNdRNLOKPnTnZ2dnUVZ_hadnZ2d@speakeasy.net> |
Cross-posted to 2 groups.
Rob Warnock wrote: > Peter Flass <Peter_Flass@Yahoo.com> wrote: > +--------------- > | jmfbahciv wrote: > | > <snort> I don't consider our byte instructions CISCy. My opinion, > | > which has to be taken as an uneducated opinion in c.a, is that > | > the PDP-10 had the RISC philosophy underneath. > | > | I'd not say they were CISCy. As I recall there was ILDB and IDPB for > | byte loads and stores that were register-storage; no storage to storage > | stuff. The comp.arch people know a lot more about the details than I do, > | but a barrel-shifter and a few gates for masking would be all you'd need. > +--------------- > > I suspect you may be confusing [or misremembering] two independent > aspects of the PDP-10: > > 1. The byte pointer instructions, LDB/ILDB/DPB/IDPB/IBP, were "memory- > reference" instructions, and thus worked on byte pointers which were > located *in memory*: the instructions used the normal address resolution > (including indexing & indirection) to get to the byte pointers. > The byte pointers themselves also accessed the data they referenced > *in memory* (and also including potential indexing & indirection). > > 2. The 16 general purpose accumulators -- a.k.a. registers -- were also > accessible *as memory* by any memory-reference instruction, at memory > locations 0-15 [0-17 octal]. [In the first PDP-6, they *were* actually > memory -- the "fast registers" were a later, high-priced option.] > > Now on the KA-10 [which had no cache(!), but on which the "fast > register" option was standard (IIRC)] putting little bits of code > or byte pointers or data accessed by byte pointers into the registers > and jumping to them (for code, or using memory-reference instructions, > for data) was significantly faster than putting then in memory, since > the registers were fast TTL (4x4?) register files whereas the core > memory cycle times were 1.0us, 1.67us, or slower, depending on the > model of core. So "clever" programs often put the inner loops of > searches (or whatever) into the regs... or byte pointers, or data > that needed to be munged multiple times. > > Unfortunately, by the time the KL-10 came out, the interactions > with instruction fetching, the MMU delays, and caching made using > the registers as "memory" actually *slower* than putting the code/data > in real memory. > > [I don't remember whether on the intermediate KI-10 it was faster > or slower to do so. Barb?] I don't know hardware specs. > > So while you *could* put byte pointer instructions, or byte pointers, > or the data they referenced into registers, that was *not* required > [and wasn't even fastest, on the later machiens]. ISTR some things had to be done in the registers but I can't remember what. Probably something to do with bootstrapping. LINK probably did quite a bit in the registers. /BAH
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Re: Solving the Floating-Point Goldilocks Problem! jmfbahciv <See.above@aol.com> - 2011-09-01 13:39 +0000
Re: Solving the Floating-Point Goldilocks Problem! "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-01 08:18 -0700
Re: Solving the Floating-Point Goldilocks Problem! jmfbahciv <See.above@aol.com> - 2011-09-02 13:44 +0000
Re: Solving the Floating-Point Goldilocks Problem! "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-02 09:37 -0700
Re: Solving the Floating-Point Goldilocks Problem! Patrick Scheible <kkt@zipcon.net> - 2011-09-02 10:21 -0700
Re: Solving the Floating-Point Goldilocks Problem! rpw3@rpw3.org (Rob Warnock) - 2011-09-05 06:11 -0500
Re: Solving the Floating-Point Goldilocks Problem! jmfbahciv <See.above@aol.com> - 2011-09-03 14:57 +0000
Re: Solving the Floating-Point Goldilocks Problem! Peter Flass <Peter_Flass@Yahoo.com> - 2011-09-03 13:13 -0400
Re: Solving the Floating-Point Goldilocks Problem! rpw3@rpw3.org (Rob Warnock) - 2011-09-05 06:41 -0500
Re: Solving the Floating-Point Goldilocks Problem! Peter Flass <Peter_Flass@Yahoo.com> - 2011-09-05 08:21 -0400
Re: Solving the Floating-Point Goldilocks Problem! jmfbahciv <See.above@aol.com> - 2011-09-05 13:26 +0000
Re: Solving the Floating-Point Goldilocks Problem! Patrick Scheible <kkt@zipcon.net> - 2011-09-05 22:48 -0700
Re: Solving the Floating-Point Goldilocks Problem! Quadibloc <jsavard@ecn.ab.ca> - 2011-09-06 16:51 -0700
Re: Solving the Floating-Point Goldilocks Problem! Morten Reistad <first@last.name> - 2011-09-07 14:14 +0200
Re: Solving the Floating-Point Goldilocks Problem! Patrick Scheible <kkt@zipcon.net> - 2011-09-07 09:45 -0700
Re: Solving the Floating-Point Goldilocks Problem! Rob Doyle <radioengr@gmail.com> - 2011-09-07 18:54 -0700
Re: Solving the Floating-Point Goldilocks Problem! Quadibloc <jsavard@ecn.ab.ca> - 2011-09-08 00:53 -0700
Re: Solving the Floating-Point Goldilocks Problem! MitchAlsup <MitchAlsup@aol.com> - 2011-09-08 08:00 -0700
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