Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]


Groups > comp.arch > #3535

Re: Bit Interleaving, Instruction Set Support for

Date 2011-09-07 20:27 +0200
From Terje Mathisen <"terje.mathisen at tmsw.no">
Newsgroups comp.arch
Subject Re: Bit Interleaving, Instruction Set Support for
References <4E655A0D.40509@SPAM.comp-arch.net> <j452o8$6sn$1@news.task.gda.pl> <4E666B47.9020009@bitblocks.com> <4gpjj8-unm.ln1@ntp6.tmsw.no> <Gvl*B-CMt@news.chiark.greenend.org.uk>
Message-ID <8mpkj8-41o.ln1@ntp6.tmsw.no> (permalink)

Show all headers | View raw


Thomas Womack wrote:
> In article<4gpjj8-unm.ln1@ntp6.tmsw.no>,
> Terje Mathisen<"terje.mathisen at tmsw.no">  wrote:
>>> On 9/6/11 5:12 AM, Piotr Wyderski wrote:
>>>> Thanks for starting the thread, as bit operations are of vital
>>>> importance in my low-level
>>>> algorithms. Apart the operations
>>>> mentioned previously, I would like to have the following instruction:
>>>>
>>>> bit_chunk_check(x, n):
>>>>
>>>> where x is an unsigned integer and n is a positive integer.
>>>> The instruction checks whether x contains a chunk of n consecutive
>>>> set bits and returns an index of the first/last/some such a chunk.
>>>> It is a generalization of bsf/bsr.
>>
>> I agree that such an instruction would be nice, but probably not
>> worthwhile to spend silicon on:
>>
>> For short runs (<  10-12 bits) lookup tables work well
>
> What do you put in the lookup table, assuming x is a 64-bit quantity?

Sorry, I sort of assumed that in a file system the bitmask will be 
_significantly_ larger than a single register!

I.e. it must be loaded from memory.

> I would do
>
> x01 = x&  (x<<1)
> x0123 = x01&  (x01<<2)
> x012 = x01&  (x<<2)
> x0123456 = x0123&  (x012<<4)
> bitscan x0123456
>
> [that's n-or-more but for file-allocation I thought that was what was
> desired; if you want 011111110 then also and in ~(x>>1) and ~(x<<7)]

Good idea.

Terje

-- 
- <Terje.Mathisen at tmsw.no>
"almost all programming can be viewed as an exercise in caching"

Back to comp.arch | Previous | Next — Previous in thread | Next in thread | Find similar | Unroll thread


Thread

Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-05 16:23 -0700
  Re: Bit Interleaving, Instruction Set Support for Mark Thorson <nospam@sonic.net> - 2011-09-05 20:07 -0800
    Re: Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-05 21:25 -0700
      Re: Bit Interleaving, Instruction Set Support for Andrew Reilly <areilly---@bigpond.net.au> - 2011-09-06 05:09 +0000
        Re: Bit Interleaving, Instruction Set Support for torbenm@diku.dk (Torben Ægidius Mogensen) - 2011-09-06 10:20 +0200
          Re: Bit Interleaving, Instruction Set Support for Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-09-06 13:28 +0200
            Re: Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-06 11:29 -0700
          Re: Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-06 11:21 -0700
          Re: Bit Interleaving, Instruction Set Support for timcaffrey@aol.com (Tim McCaffrey) - 2011-09-09 19:10 +0000
            Re: Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-10 12:50 -0700
            Re: Bit Interleaving, Instruction Set Support for torbenm@diku.dk (Torben Ægidius Mogensen) - 2011-09-13 10:34 +0200
      Re: Bit Interleaving, Instruction Set Support for Mark Thorson <nospam@sonic.net> - 2011-09-07 12:43 -0800
        Re: Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-10 12:27 -0700
          Re: Bit Interleaving, Instruction Set Support for "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-09-11 21:05 -0700
        Re: Bit Interleaving, Instruction Set Support for EricP <ThatWouldBeTelling@thevillage.com> - 2011-09-10 16:57 -0400
          Re: Bit Interleaving, Instruction Set Support for George Neuner <gneuner2@comcast.net> - 2011-09-10 23:14 -0400
            Re: Bit Interleaving, Instruction Set Support for nmm1@cam.ac.uk - 2011-09-11 10:16 +0100
              Re: Bit Interleaving, Instruction Set Support for EricP <ThatWouldBeTelling@thevillage.com> - 2011-09-11 12:30 -0400
    Re: Bit Interleaving, Instruction Set Support for Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-09-06 13:25 +0200
  Re: Bit Interleaving, Instruction Set Support for Quadibloc <jsavard@ecn.ab.ca> - 2011-09-05 21:02 -0700
  Re: Bit Interleaving, Instruction Set Support for Piotr Wyderski <peter.pan@neverland.mil> - 2011-09-06 14:12 +0200
    Re: Bit Interleaving, Instruction Set Support for Bakul Shah <usenet@bitblocks.com> - 2011-09-06 11:49 -0700
      Re: Bit Interleaving, Instruction Set Support for Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-09-07 11:18 +0200
        Re: Bit Interleaving, Instruction Set Support for Thomas Womack <twomack@chiark.greenend.org.uk> - 2011-09-07 10:54 +0100
          Re: Bit Interleaving, Instruction Set Support for Terje Mathisen <"terje.mathisen at tmsw.no"> - 2011-09-07 20:27 +0200
  Re: Bit Interleaving, Instruction Set Support for MitchAlsup <MitchAlsup@aol.com> - 2011-09-07 12:23 -0700

csiph-web