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| Message-ID | <4E5648FC.4090308@SPAM.comp-arch.net> (permalink) |
|---|---|
| Date | 2011-08-25 09:07 -0400 |
| From | "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> |
| Organization | comp-arch.net |
| Newsgroups | comp.arch |
| Subject | Re: IBM demos cognitive computer chips |
| References | (4 earlier) <4dd73d66-2fcd-4612-be8f-eeb7709b456c@k15g2000yqd.googlegroups.com> <j2rkm6$1s4$1@news.albasani.net> <4E525C8E.5070109@SPAM.comp-arch.net> <610d5ae7-29a1-4e42-af65-c3d6cdd56fa1@r40g2000prf.googlegroups.com> <4E55B046.8080306@SPAM.comp-arch.net> |
[Attributions - not misattributed, but not all quotees may have quotes included after editing] On 8/24/2011 10:15 PM, Andy "Krazy" Glew wrote: > On 8/23/2011 12:36 PM, Eric Northup wrote: >> On Aug 22, 6:41 am, "Andy \"Krazy\" Glew"<a...@SPAM.comp-arch.net> >> wrote: >>> On 8/21/2011 2:56 PM, BGB wrote: >>> Interleaved stacks for when operating in lockste, or nearly so. >>> >>> Uninterleaved stacks for MIMD parallel. >> >> I presume the benefit is for improved locality of memory references. >... > Stack interleaving arises for reasons that include: > > * when you have several coherent threads, some variables, such as loop > counter variables, are common to all threads, while others are > per-thread. It is wasteful to push N copies of the same loop counter on > separate stacks. > > * but mainly (I think) because of the mindset where you think of the > threads as not being independent, but instead being lockstep, with a > single instruction pointer, and a mask indicating which threads are > active and which are disabled. It should be pointed out that "interleaved stack" is generic, and does not necessarily mean that there is a single stack for all work. As Bernd Paysan points out (http://bernd-paysan.de/4stack.html), one stack is common, dual stack is forthright, and four stacks may bew what you want. (OK, bad attempt at humor. :-) The SIMD/SIMT/coherent threading control flow stack on which mask and PCs are pushed could be a microarchitecture stack entirely separate from all of the other stacks. Of depth equal to the maximum number of threads in a workgroup, warp, or wavefront. But if it is microarchitecture and you have a conventional stacks for the vector lane threads, then you need logic to verify, on occasion, whether the threads are still coherent. A separate data stack that allows you to take advantage of cross-thread variables by pushing them only once, whereas you push a vector for per-thread variables, is straightforward - but may lead to misalignment if the allocation order on the stack is conventional. This is exactly the problem that you have with vector machines - allocating scalars and vectors on the same stack leads to misalignment and/or padding. Separate stacks for scalars and vectors, or other sizes, may be desirable. Finally, yes, as Eric pointed out, there is probably better locality for coherent threads with interleaved stacks. Or, at least, fewer cache lines required. I suspect that addressing these issues is one motivation of AMD apparently abandoning SMT/coherent threading in their next generation GPU, which I like to call "Larrabee done right". The explicit vector ISA gives software more control over these data alignment issues. Nevertheless, I suspect that somebody, perhaps not AMD, will come up with instructions that make it easier to do SIMT/instruction coherence using vector masks.
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IBM demos cognitive computer chips Brett Davis <ggtgp@yahoo.com> - 2011-08-18 18:02 -0500
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-18 20:37 -0400
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-19 13:40 -0400
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-19 11:52 -0700
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-19 15:50 -0400
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-20 00:15 -0700
Re: IBM demos cognitive computer chips Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-08-20 09:22 -0700
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-20 14:10 -0400
Re: IBM demos cognitive computer chips Quadibloc <jsavard@ecn.ab.ca> - 2011-08-21 05:16 -0700
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-21 11:56 -0700
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-21 15:29 -0400
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-21 13:19 -0700
Re: IBM demos cognitive computer chips "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-22 09:41 -0400
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-22 12:22 -0700
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-22 13:01 -0700
Re: IBM demos cognitive computer chips "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-23 10:11 -0400
Re: IBM demos cognitive computer chips Eric Northup <digitaleric@gmail.com> - 2011-08-23 09:36 -0700
Re: IBM demos cognitive computer chips "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-24 22:15 -0400
Re: IBM demos cognitive computer chips "Andy \"Krazy\" Glew" <andy@SPAM.comp-arch.net> - 2011-08-25 09:07 -0400
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-20 01:41 -0400
Re: IBM demos cognitive computer chips Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-08-20 08:55 -0700
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-20 16:10 -0400
Re: IBM demos cognitive computer chips Stephen Fuld <SFuld@alumni.cmu.edu.invalid> - 2011-08-21 21:11 -0700
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-22 12:04 -0400
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-22 12:22 -0400
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-22 14:24 -0400
Re: IBM demos cognitive computer chips Quadibloc <jsavard@ecn.ab.ca> - 2011-08-22 19:32 -0700
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-22 23:21 -0700
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-23 09:49 -0700
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-23 09:46 -0700
Re: IBM demos cognitive computer chips BGB <cr88192@hotmail.com> - 2011-08-23 15:05 -0700
Re: IBM demos cognitive computer chips Piotr Wyderski <peter.pan@neverland.mil> - 2011-08-26 16:04 +0200
Re: IBM demos cognitive computer chips Quadibloc <jsavard@ecn.ab.ca> - 2011-08-26 09:58 -0700
Re: IBM demos cognitive computer chips ChrisQ <meru@devnull.com> - 2011-08-29 14:56 +0100
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-29 11:06 -0400
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-29 16:10 -0400
Re: IBM demos cognitive computer chips EricP <ThatWouldBeTelling@thevillage.com> - 2011-08-29 17:48 -0400
Re: IBM demos cognitive computer chips Robert Myers <rbmyersusa@gmail.com> - 2011-08-29 19:24 -0400
Re: IBM demos cognitive computer chips ggtgp@yahoo.com - 2012-03-30 21:54 -0700
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