Introducing an asm/1 statement in a Prolog system (Re: AI Accelerators and ISO Prolog multi-threading)

From	Mild Shock <janburse@fastmail.fm>
Newsgroups	comp.lang.prolog
Subject	Introducing an asm/1 statement in a Prolog system (Re: AI Accelerators and ISO Prolog multi-threading)
Date	2026-08-09 20:25 +0200
Message-ID	<115agnc$6cpu$1@solani.org> (permalink)
References	<107cdg8$3ok7g$1@solani.org> <10p44s1$16ps$1@solani.org> <114cv6j$kb0c$1@solani.org>

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Hi,

I am on the brink of introducig an asm/1 statement
in a Prolog system. The π-WAM subsystem seems
predestined to support that. And it would help

somehow, to comfortable compile and extend the
π-WAM subsystem and the submitted goals. One
could directly write built-ins in π-WAM assembly,

targeting the Hack VM. asm/1 would be more free than
for example what Aquarius Prolog did when they had Berkeley
Abstract Machine (BAM) (*), and which wasn't exposed

it seems via a asm/1. On the other hand C and Rust,
support asm/1 for many targets, exposing their
Assembly phase from the compiler backend:

Inline assembly
https://en.cppreference.com/c/language/asm

Inline assembly
https://doc.rust-lang.org/reference/inline-assembly.html

While the above is true assembly, i.e. architectures
such as x86, ARM, etc.., and gives Scryer Prolog quite
some edge, it could try to transpile WAM to ASM.

In my case I would expose Hack VM ASM. And the thingy
would be highly dynamic, its not that is only a
compiletime thingy, it can of course be called

at runtime with dynamic arguments.

(*)
Can Logic Programming Execute as Fast as Imperative Programming?
Peter Lodewijk Van Roy - 1990
https://webperso.info.ucl.ac.be/~pvr/Thesis/ThesisMain.pdf


Mild Shock schrieb:
> Hi,
> 
> Usual question:
> 
>  > Why implement both pre-emptive threading
> AND cooperative tasks/engines?
> 
> I had implemented the ISO proposal in formerly Jekejeke
> Prolog, you find the ISO proposal here:
> 
> ISO/IEC DTR 13211–5:2007
> Prolog multi-threading support
> https://logtalk.org/plstd/threads.pdf
> 
> But the ISO proposal doesn't match modern WebGPU APIs,
> where your logical threads can live remotely in a dedicated GPU
> 
> in the VRAM there, and where you would have launch
> parameters that say: Hey please run 4096 compute
> 
> shaders for me, that have independet thread state. Using
> cooperative multi-tasking as the orchestrator works well.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> How would we do a reverse sorted map?
>>
>> I find in Java:
>>
>> TreeMap(Comparator<? super K> comparator)
>> Constructs a new, empty tree map, ordered
>> according to the given comparator.
>> https://docs.oracle.com/javase/8/docs/api/java/util/TreeMap.html
>>
>> Or in Dogelog Player:
>>
>> tree_new(T):
>> tree_new(T, F):
>> The predicate succeeds in R with a new red-black tree.
>> The binary predicate allows specifying a term compare F.
>> https://www.dogelog.ch/typtab/doclet/book/12_lang/05_libraries/03_util/06_tree.html 
>>
>>
>> Here is an example, using the destructive API. But
>> the same constructor works also for the non-destructive API.
>>
>> ?- tree_new(_T), tree_add(_T, 0rInf, foo),
>>     tree_add(_T, 0rNaN, bar), tree_pairs(_T, L).
>> L = [0rNaN-bar, 0rInf-foo].
>>
>> And now using a comparator modifier, aggregate with a comparator,
>> as a closure. Some Joy of Higher Order logic programming:
>>
>> reverse(C, R, X, Y) :- call(C, R, Y, X).
>>
>> ?- tree_new(_T,reverse(compare)), tree_add(_T, 0rInf, foo),
>>     tree_add(_T, 0rNaN, bar), tree_pairs(_T, L).
>> L = [0rInf-foo, 0rNaN-bar].
>>
>> ?- tree_new(_T,reverse(reverse(compare))), tree_add(_T, 0rInf, foo),
>>     tree_add(_T, 0rNaN, bar), tree_pairs(_T, L).
>> L = [0rNaN-bar, 0rInf-foo].
>>
>> Just toying around with my new NaNs.
>>
>> Have Fun!
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Functional requirement:
>>>
>>> ?- Y = g(_,_), X = f(Y,C,D,Y), term_singletons(X, L),
>>>     L == [C,D].
>>>
>>> ?- Y = g(A,X,B), X = f(Y,C,D), term_singletons(X, L),
>>>     L == [A,B,C,D].
>>>
>>> Non-Functional requirement:
>>>
>>> ?- member(N,[5,10,15]), time(singletons(N)), fail; true.
>>> % Zeit 1 ms, GC 0 ms, Lips 4046000, Uhr 11.08.2025 01:36
>>> % Zeit 3 ms, GC 0 ms, Lips 1352000, Uhr 11.08.2025 01:36
>>> % Zeit 3 ms, GC 0 ms, Lips 1355333, Uhr 11.08.2025 01:36
>>> true.
>>>
>>> Can your Prolog system do that?
>>>
>>> P.S.: Benchmark was:
>>>
>>> singletons(N) :-
>>>     hydra2(N,Y),
>>>     between(1,1000,_), term_singletons(Y,_), fail; true.
>>>
>>> hydra2(0, _) :- !.
>>> hydra2(N, s(X,X)) :-
>>>     M is N-1,
>>>     hydra2(M, X).
>>>
>>> Bye
>>
>

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          Work slicing can simulate AbortController (Was: Summer Challenge: libSQL = Prolog+Modes [VDBE versus π-WAM]) Mild Shock <janburse@fastmail.fm> - 2026-08-01 13:23 +0200
      Introducing an asm/1 statement in a Prolog system (Was: AI Accelerators and ISO Prolog multi-threading) Mild Shock <janburse@fastmail.fm> - 2026-08-09 20:21 +0200
      Introducing an asm/1 statement in a Prolog system (Re: AI Accelerators and ISO Prolog multi-threading) Mild Shock <janburse@fastmail.fm> - 2026-08-09 20:25 +0200

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