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Paul Tarau versus Mr. Taskmanager, who would win? [A PDP-11 Humunkulus from 1979]

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  Paul Tarau versus Mr. Taskmanager, who would win? [A PDP-11 Humunkulus from 1979] Mild Shock <janburse@fastmail.fm> - 2026-04-24 02:46 +0200
    AI dooms day escape: Güttinger Wald (Re: Paul Tarau versus Mr. Taskmanager, who would win?) Mild Shock <janburse@fastmail.fm> - 2026-04-25 14:06 +0200
      Elmos Fascist Dreams of a 365 Prolog (Was: AI dooms day escape: Güttinger Wald) Mild Shock <janburse@fastmail.fm> - 2026-05-09 12:52 +0200
        Even the Buddos are clueless [Did Tarau see Liliputians?] (Re: Elmos Fascist Dreams of a 365 Prolog) Mild Shock <janburse@fastmail.fm> - 2026-05-09 15:19 +0200
          Halfing the AI Laptop Budget: Ne-Meow sold out! (Re: Even the Buddos are clueless [Did Tarau see Liliputians?]) Mild Shock <janburse@fastmail.fm> - 2026-05-10 09:09 +0200
      Prolog Expert Ginis (PEGs) on a Keychain (Re: AI dooms day escape: Güttinger Wald) Mild Shock <janburse@fastmail.fm> - 2026-06-20 13:04 +0800
        Chatbot Classified as a Weapon (Re: Prolog Expert Ginis (PEGs) on a Keychain) Mild Shock <janburse@fastmail.fm> - 2026-06-21 05:39 +0800
        Introduction to AI Accelerator Prolog [π-WAM of Dogelog] (Re: Prolog Expert Ginis (PEGs) on a Keychain) Mild Shock <janburse@fastmail.fm> - 2026-07-17 11:16 +0200
          Not praying to the god of lambda calculus [π beats α] (Re: Introduction to AI Accelerator Prolog [π-WAM of Dogelog]) Mild Shock <janburse@fastmail.fm> - 2026-07-17 11:17 +0200
          Re: Introduction to AI Accelerator Prolog [π-WAM of Dogelog] (Re: Prolog Expert Ginis (PEGs) on a Keychain) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-17 13:03 -0700
            pi in pi-WAM refers to pi-calculus (Was: Introduction to AI Accelerator Prolog [π-WAM of Dogelog] ) Mild Shock <janburse@fastmail.fm> - 2026-07-18 01:16 +0200
              Milners fickle() in pi-WAM [For fun and profit] (Re: pi in pi-WAM refers to pi-calculus) Mild Shock <janburse@fastmail.fm> - 2026-07-18 01:50 +0200
                Re: Milners fickle() in pi-WAM [For fun and profit] (Re: pi in pi-WAM refers to pi-calculus) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-18 01:34 -0700
                  Robin Milners pi calculus is typeless (Was: Milners fickle() in pi-WAM [For fun and profit]) Mild Shock <janburse@fastmail.fm> - 2026-07-18 10:57 +0200
                    Can the Church Turing hypotheses be refuted? [TLo @ FOM] (Was: Robin Milners pi calculus is typeless) Mild Shock <janburse@fastmail.fm> - 2026-07-18 11:08 +0200
      AI Laptops are just strange novel xBoxes (Was: AI dooms day escape: Güttinger Wald) Mild Shock <janburse@fastmail.fm> - 2026-07-08 20:44 +0200
        Re: AI Laptops are just strange novel xBoxes (Was: AI dooms day escape: Güttinger Wald) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-08 15:22 -0700
          TDR solutions --> work slicing (Was: AI Laptops are just strange novel xBoxes) Mild Shock <janburse@fastmail.fm> - 2026-07-09 09:47 +0200
            Thinking of Chris M. Thomasson: From shadertoys to computetoys? (Re: TDR solutions --> work slicing) Mild Shock <janburse@fastmail.fm> - 2026-07-09 09:52 +0200
      FYI: Unified Memory Architecture (UMA) (Re: Implementing Gas for a Compute Shader [Avoid TDR]) Mild Shock <janburse@fastmail.fm> - 2026-07-09 19:43 +0200
        The Wider von Neumann Neck (Re: FYI: Unified Memory Architecture (UMA)) Mild Shock <janburse@fastmail.fm> - 2026-07-10 07:51 +0200
          The new MIMD Warp is the cherry on top (Re: The Wider von Neumann Neck) Mild Shock <janburse@fastmail.fm> - 2026-07-10 08:08 +0200
          Dumbwit, just run it on your RTX 5070 trash (Re: The Wider von Neumann Neck) Mild Shock <janburse@fastmail.fm> - 2026-07-10 15:49 +0200
            We are still waiting for results! [Confused Dumbwit] (Re: We are waiting Dumbwit: 1 Month, 3 Months, .. [node.js dawn]) Mild Shock <janburse@fastmail.fm> - 2026-07-10 22:45 +0200
              404 Brain not Found [GPU saturation] (Re: We are still waiting for results! [Confused Dumbwit]) Mild Shock <janburse@fastmail.fm> - 2026-07-10 23:40 +0200
                I nowhere talked about 10GB/s (Re: 404 Brain not Found [GPU saturation]) Mild Shock <janburse@fastmail.fm> - 2026-07-10 23:41 +0200
                  I nowhere said something about AI (Re: I nowhere talked about 10GB/s) Mild Shock <janburse@fastmail.fm> - 2026-07-10 23:52 +0200
                    What do you not understand in "budget"? (Re: I nowhere said something about AI) Mild Shock <janburse@fastmail.fm> - 2026-07-11 00:08 +0200
                      SWI makes only MLips not GLips (Re: What do you not understand in "budget"?) Mild Shock <janburse@fastmail.fm> - 2026-07-11 00:09 +0200
                        micro penis got hurt by "budget" (Re: SWI makes only MLips not GLips) Mild Shock <janburse@fastmail.fm> - 2026-07-12 19:20 +0200
    Micro Penis Nemesis: Shoe String Budget π-WAM (Was: Paul Tarau versus Mr. Taskmanager, who would win?) Mild Shock <janburse@fastmail.fm> - 2026-07-12 19:26 +0200
      micro penis struggels with mobile grade GPU concept [Redmi Note 14 Pro+ Results] (Re: Micro Penis Nemesis: Shoe String Budget π-WAM) Mild Shock <janburse@fastmail.fm> - 2026-07-12 21:32 +0200
        Micro Penis Existential Crisis: DeepSeek on a Mobile GPU (Re: micro penis struggels with mobile grade GPU concept [Redmi Note 14 Pro+ Results]) Mild Shock <janburse@fastmail.fm> - 2026-07-12 21:47 +0200
          Micro Penis is worse than Sleepy Joe (Re: Micro Penis Existential Crisis: DeepSeek on a Mobile GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-12 23:00 +0200
            Maybe change your pampers? (Was: Micro Penis is worse than Sleepy Joe) Mild Shock <janburse@fastmail.fm> - 2026-07-12 23:01 +0200
              herpes blister rossy boy is confused (Re: Maybe change your pampers?) Mild Shock <janburse@fastmail.fm> - 2026-07-13 06:54 +0200
                nothing gets blocked except your brain [LPDDR5X-RAM] (Re: herpes blister rossy boy is confused) Mild Shock <janburse@fastmail.fm> - 2026-07-13 13:21 +0200
                  flogging a dead horse PCI VRAM graphic cards (Re: nothing gets blocked except your brain [LPDDR5X-RAM]) Mild Shock <janburse@fastmail.fm> - 2026-07-13 13:52 +0200
                GPUs evolved from SIMD to MIMD [NVIDIA Volta 2017] (Re: herpes blister rossy boy is confused) Mild Shock <janburse@fastmail.fm> - 2026-07-20 17:11 +0200
                  A.D.I.D.A.S. Gopnik lost his screws (Re: GPUs evolved from SIMD to MIMD [NVIDIA Volta 2017]) Mild Shock <janburse@fastmail.fm> - 2026-07-20 19:58 +0200
    I'm a spinner, I'm a sinner [Dmitry Vyukov for pi-WAM] (Re: Paul Tarau versus Mr. Taskmanager, who would win? [A PDP-11 Humunkulus from 1979] Mild Shock <janburse@fastmail.fm> - 2026-07-19 11:55 +0200
      Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov (Re: I'm a spinner, I'm a sinner [Dmitry Vyukov for pi-WAM]) Mild Shock <janburse@fastmail.fm> - 2026-07-20 08:33 +0200
        The Cache Identity Crisis by Micro Penis (Re: Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov) Mild Shock <janburse@fastmail.fm> - 2026-07-20 13:54 +0200
          Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) Mild Shock <janburse@fastmail.fm> - 2026-07-20 14:10 +0200
            The large memory tax: ECC RAM (Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Mild Shock <janburse@fastmail.fm> - 2026-07-20 14:23 +0200
            Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-20 12:26 -0700
              Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) R Kym Horsell <kymhorsell@gmail.com> - 2026-07-20 22:20 +0000
                Friendly Reminder: GPU 10x more performant than CPU (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:39 +0200
                  Breaking the CUDA edge in AI by WebGPU (Was: Friendly Reminder: GPU 10x more performant than CPU) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:56 +0200
                    Like WebAssembly before it, WebGPU has "escaped" the browser. (Was: Breaking the CUDA edge in AI by WebGPU) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:05 +0200
                      If you are paranoid you can use Falco [Agentic AI] (Re: Like WebAssembly before it, WebGPU has "escaped" the browser.) Mild Shock <janburse@fastmail.fm> - 2026-07-21 22:57 +0200
                        What would an EMACS guru say [Windows Recall] (Re: If you are paranoid you can use Falco [Agentic AI]) Mild Shock <janburse@fastmail.fm> - 2026-07-21 23:35 +0200
                          Decide what you critique tiny winy penis (Re: What would an EMACS guru say [Windows Recall]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 08:17 +0200
                            How confused is tiny winy penis? (Was: Decide what you critique tiny winy penis) Mild Shock <janburse@fastmail.fm> - 2026-07-22 08:28 +0200
                              Maybe change your hobby, become a dog owner? (Was: How confused is tiny winy penis?) Mild Shock <janburse@fastmail.fm> - 2026-07-22 09:37 +0200
                            Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis] (Re: Decide what you critique tiny winy penis ) Mild Shock <janburse@fastmail.fm> - 2026-07-22 11:19 +0200
                              node.js has also Worker isolation , headless (Was: Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 11:29 +0200
                                Abyss hobby interpretation vs. professional understanding [Keep up with the Kardashians] (Re: node.js has also Worker isolation , headless) Mild Shock <janburse@fastmail.fm> - 2026-07-22 11:38 +0200
                                  Play stupid games, win classic Usenet prizes [CCCP Troll] (Re: Abyss hobby interpretation vs. professional understanding [Keep up with the Kardashians]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 12:16 +0200
                                    Glue Sniffing 5-Year Old Moron [CCCP Troll] (Was: Play stupid games, win classic Usenet prizes [CCCP Troll]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:29 +0200
                              My Swift Go 16 AI has no IMEI, are you nuts? (Re: Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis]) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:15 +0200
                                Same nickname and email, could post faster [5 year old moron] (Re: My Swift Go 16 AI has no IMEI, are you nuts? ) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:25 +0200
                                I have nothing to hide, you can find me in search.ch (Re: My Swift Go 16 AI has no IMEI, are you nuts?) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:41 +0200
                                  Where did I confirm German via .ch, you are more than nuts! (Re: I have nothing to hide, you can find me in search.ch) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:48 +0200
                                    Ask a Ukrainian Neighbour to do Detective [CCCP Troll] (Re: Where did I confirm German via .ch, you are more than nuts! ) Mild Shock <janburse@fastmail.fm> - 2026-07-22 14:51 +0200
              Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-20 21:36 -0700
                rossy boy is going paranoid (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Mild Shock <janburse@fastmail.fm> - 2026-07-21 09:01 +0200
                  Re: rossy boy is going paranoid (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines]) Ross Finlayson <ross.a.finlayson@gmail.com> - 2026-07-21 00:56 -0700
          L1,..,Ln caches are located on the CPU AND on the GPU (Was: The Cache Identity Crisis by Micro Penis( Mild Shock <janburse@fastmail.fm> - 2026-07-20 19:35 +0200
            GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-20 19:40 +0200
              Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-20 22:02 +0200
                Where is micro penis mental error? (Re: Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU) Mild Shock <janburse@fastmail.fm> - 2026-07-20 22:07 +0200
        I didn't find Futex in WebGPU / WGSL (Re: Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov) Mild Shock <janburse@fastmail.fm> - 2026-07-20 23:26 +0200
          There is no imageAtomicAdd in WGSL (Re: I didn't find Futex in WebGPU / WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:15 +0200
            OpenGL is dead. Apple said bye bye / Wayland Compositor (Re: There is no imageAtomicAdd in WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 00:26 +0200
            Flogging a Dead Horse, OpenGL is EOL (Re: There is no imageAtomicAdd in WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:39 +0200
              imageAtomicAdd trivial, Dmitry Vyukov requires capacity (Re: Flogging a Dead Horse, OpenGL is EOL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:40 +0200
                capacity = 2^n for some n / systolic system (Re: imageAtomicAdd trivial, Dmitry Vyukov requires capacity) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:41 +0200
                  Source of the benchmark for DmitryVyukov (Was: capacity = 2^n for some n / systolic system) Mild Shock <janburse@fastmail.fm> - 2026-07-21 01:44 +0200
            Re: There is no imageAtomicAdd in WGSL (Re: I didn't find Futex in WebGPU / WGSL) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-20 16:59 -0700
              I never used OpenGL Version 4.2 and later (Was: There is no imageAtomicAdd in WGSL) Mild Shock <janburse@fastmail.fm> - 2026-07-21 08:47 +0200
                Because of MIMD you have to reassess algorithms (Re: I never used OpenGL Version 4.2 and later) Mild Shock <janburse@fastmail.fm> - 2026-07-21 09:02 +0200
                  Re: Because of MIMD you have to reassess algorithms (Re: I never used OpenGL Version 4.2 and later) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-22 13:34 -0700
                    Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) Mild Shock <janburse@fastmail.fm> - 2026-07-23 00:09 +0200
                      Re: Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) Mild Shock <janburse@fastmail.fm> - 2026-07-23 00:53 +0200
                      Re: Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-22 18:00 -0700
                        Re: Do you see the loops, in C code and in Java code? /** Looping **/ (Was: Because of MIMD you have to reassess algorithms) "Chris M. Thomasson" <chris.m.thomasson.1@gmail.com> - 2026-07-22 18:20 -0700

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#348193 — My Swift Go 16 AI has no IMEI, are you nuts? (Re: Even dogs know Switzerland != Germany [Syphilis Brain Micro Penis])

Hi,

The IMEI (International Mobile Equipment Identity)
is a 15-digit, globally unique serial number that
identifies every mobile phone.

Most laptops do not have an IMEI number. It only
exists if the device has an integrated cellular
modem (WWAN/LTE/5G card) for SIM cards.

Also in Switzerland people have fiber optic earth
cables for internet, and not some 5G over the air.
I got like 10 GBit/s fiber here in my home.

There are 96 internet service providers that offer that speed:

https://www.comparis.ch/telecom/zuhause/angebote/list?requestobject={%22products%22%3A[1]%2C%22onlyOffersWithoutMinimumDuration%22%3Afalse%2C%22internetSpeedTypes%22%3A[1]%2C%22connectionTypes%22%3A[1]%2C%22tvOptions%22%3A[]%2C%22landlineOptions%22%3A[]%2C%22providers%22%3A[]%2C%22showDiscountedOnly%22%3Afalse%2C%22addressCheckInfo%22%3A{%22AvailableCableProviders%22%3Anull%2C%22AvailableVdslSpeed%22%3Anull%2C%22AvailableFiberSpeed%22%3Anull%2C%22AvailableInit7Fiber%22%3Afalse%2C%22AvailableAllFiberProvidersExceptInit7%22%3Afalse}%2C%22address%22%3A{%22Zip%22%3Anull%2C%22Street%22%3Anull%2C%22StreetNumber%22%3Anull}}
Angebote für Internet, TV und Festnetz-Telefon, sowie Kombiangebote

Its handy to download LLMs which have GB sizes.

But this laptop has no SIM Card, even not a e-SIM:

 > How confused is tiny winy penis?
 > For the 100th time the budget here:
 >
 > 11.4 Giga Lips with a Budget Laptop
 > Ryzen AI 7 350 w/ Radeon 860M
 > https://github.com/Jean-Luc-Picard-2021/gigabudget
 >
 > is a laptop and not a smartphone. It
 > has no cellphone number. And w/ means
 > integrated GPU on the silicon chip,
 >
 > and not a GPU connected to the mainboard
 > via some PCI bus. The model is a acer
 > swift go, I already posted this info:
 >
 > Swift Go 16 AI SFG16-61-R21J Notebook
 > 
https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007

Bye

Roque Bahtinov schrieb:
 > Mild Shock wrote:
 >
 >> Moron, from St. Petersburg, with only 5G internet.
 >> You confuse browser security model with Google account.
 >> No cellphone number involved in a brower JavaScript
 >
 > cretin, they already have your phone number, the IMEI, email adr, 
location
 > and everything, your friends included. Idiot, I cant even believe it.
 >

Mild Shock schrieb:
> Hi,
> 
> Moron, from St. Petersburg, with only 5G internet.
> You confuse browser security model with Google account.
> No cellphone number involved in a brower JavaScript
> 
> secure sand box, for executing JavaScript in the main
> and in isolated siloed workers. Also you seem not to see
> that I post CHF price tags and CHF product listings.
> 
> So what makes you think Switzerland == Germany,
> when you rant like below. Even a dog knows that a
> non-EU country cannot be the same as EU country:
> 
>  > you stupid half german, the comparisons along
>  > memories arrays gpu card located, are taking
>  > place parallel without cpu intervention, you
>  > fucking illiterate idiot. You soon will become a
>  > quarter german hence 3/4 russian old days,
>  > historically. It's coming
>  >
>  > German energy crisis caused by ‘lack of Russian gas’ – Merz
>  > https://www.rt.com/news/643254-germany-crisis-russian-gas/
> 
> Bye
> 
> P.S.: EU = European Union
> 
> Audie Balaban schrieb:
>  > Mild Shock wrote:
>  >
>  >> Maybe you could post some subtantial critique moron? Instead of
>  >> gibberish all the time. What does a cellphone number have to do with a
>  >> REST endpoint? Nothing!
>  >>
>  >> Its all locally and my laptop has no cellphone number:
>  >
>  > you lying bitch, your arse is burning, you said google chrome security,
>  > and gave them your cellphone number, fucking idiot. And you put wrong
>  > ports numbers along the localhost: idiot
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Maybe you could post some subtantial critique moron?
>> Instead of gibberish all the time. What does a cellphone
>> number have to do with a REST endpoint? Nothing!
>>
>> Its all locally and my laptop has no cellphone number:
>>
>> Start the REST API server
>>
>> To start the server, run the following command:
>> lms server start
>>
>> Endpoints
>>
>> GET /api/v0/models
>> List all loaded and downloaded models
>> Example request
>> curl -H "Authorization: Bearer $LM_API_TOKEN" 
>> http://localhost:1234/api/v0/models
>> Response format
>> {
>>    "object": "list",
>>    "data": [
>>      {
>>        "id": "qwen2-vl-7b-instruct",
>>        "object": "model",
>>        "type": "vlm",
>>        "publisher": "mlx-community",
>>        "arch": "qwen2_vl"
>> Etc...
>> https://lmstudio.ai/docs/developer/rest/endpoints
>>
>> Bye
>>
>> BTW: LM Studio recently introduced LM Link,
>> which provides some VPN. It can be used to
>> create clients or servers that run models.
>>
>> It is end-to-end encrypted, and built on top
>> of custom Tailscale mesh VPNs. This is for
>> the paranoid, that want to acccess a
>>
>> LLM from one end of the globe, that sits
>> on the other end of the globe, and have
>> no evesdroper or whatever on the
>>
>> information that is exchanged.

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#348194 — Same nickname and email, could post faster [5 year old moron] (Re: My Swift Go 16 AI has no IMEI, are you nuts? )

Hi,

5 year old moron. Why does it take 11 hours until
your next nonsense pours in? Takes too much time
to create a new nickname and new email every time?

Well once a moron, always a moron.

Bye

Mild Shock schrieb:
> Hi,
> 
> The IMEI (International Mobile Equipment Identity)
> is a 15-digit, globally unique serial number that
> identifies every mobile phone.
> 
> Most laptops do not have an IMEI number. It only
> exists if the device has an integrated cellular
> modem (WWAN/LTE/5G card) for SIM cards.
> 
> Also in Switzerland people have fiber optic earth
> cables for internet, and not some 5G over the air.
> I got like 10 GBit/s fiber here in my home.
> 
> There are 96 internet service providers that offer that speed:
> 
> https://www.comparis.ch/telecom/zuhause/angebote/list?requestobject={%22products%22%3A[1]%2C%22onlyOffersWithoutMinimumDuration%22%3Afalse%2C%22internetSpeedTypes%22%3A[1]%2C%22connectionTypes%22%3A[1]%2C%22tvOptions%22%3A[]%2C%22landlineOptions%22%3A[]%2C%22providers%22%3A[]%2C%22showDiscountedOnly%22%3Afalse%2C%22addressCheckInfo%22%3A{%22AvailableCableProviders%22%3Anull%2C%22AvailableVdslSpeed%22%3Anull%2C%22AvailableFiberSpeed%22%3Anull%2C%22AvailableInit7Fiber%22%3Afalse%2C%22AvailableAllFiberProvidersExceptInit7%22%3Afalse}%2C%22address%22%3A{%22Zip%22%3Anull%2C%22Street%22%3Anull%2C%22StreetNumber%22%3Anull}} 
> 
> Angebote für Internet, TV und Festnetz-Telefon, sowie Kombiangebote
> 
> Its handy to download LLMs which have GB sizes.
> 
> But this laptop has no SIM Card, even not a e-SIM:
> 
>  > How confused is tiny winy penis?
>  > For the 100th time the budget here:
>  >
>  > 11.4 Giga Lips with a Budget Laptop
>  > Ryzen AI 7 350 w/ Radeon 860M
>  > https://github.com/Jean-Luc-Picard-2021/gigabudget
>  >
>  > is a laptop and not a smartphone. It
>  > has no cellphone number. And w/ means
>  > integrated GPU on the silicon chip,
>  >
>  > and not a GPU connected to the mainboard
>  > via some PCI bus. The model is a acer
>  > swift go, I already posted this info:
>  >
>  > Swift Go 16 AI SFG16-61-R21J Notebook
>  > 
> https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007 
> 
> 
> Bye
> 
> Roque Bahtinov schrieb:
>  > Mild Shock wrote:
>  >
>  >> Moron, from St. Petersburg, with only 5G internet.
>  >> You confuse browser security model with Google account.
>  >> No cellphone number involved in a brower JavaScript
>  >
>  > cretin, they already have your phone number, the IMEI, email adr, 
> location
>  > and everything, your friends included. Idiot, I cant even believe it.
>  >
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Moron, from St. Petersburg, with only 5G internet.
>> You confuse browser security model with Google account.
>> No cellphone number involved in a brower JavaScript
>>
>> secure sand box, for executing JavaScript in the main
>> and in isolated siloed workers. Also you seem not to see
>> that I post CHF price tags and CHF product listings.
>>
>> So what makes you think Switzerland == Germany,
>> when you rant like below. Even a dog knows that a
>> non-EU country cannot be the same as EU country:
>>
>>  > you stupid half german, the comparisons along
>>  > memories arrays gpu card located, are taking
>>  > place parallel without cpu intervention, you
>>  > fucking illiterate idiot. You soon will become a
>>  > quarter german hence 3/4 russian old days,
>>  > historically. It's coming
>>  >
>>  > German energy crisis caused by ‘lack of Russian gas’ – Merz
>>  > https://www.rt.com/news/643254-germany-crisis-russian-gas/
>>
>> Bye
>>
>> P.S.: EU = European Union
>>
>> Audie Balaban schrieb:
>>  > Mild Shock wrote:
>>  >
>>  >> Maybe you could post some subtantial critique moron? Instead of
>>  >> gibberish all the time. What does a cellphone number have to do 
>> with a
>>  >> REST endpoint? Nothing!
>>  >>
>>  >> Its all locally and my laptop has no cellphone number:
>>  >
>>  > you lying bitch, your arse is burning, you said google chrome 
>> security,
>>  > and gave them your cellphone number, fucking idiot. And you put wrong
>>  > ports numbers along the localhost: idiot
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Maybe you could post some subtantial critique moron?
>>> Instead of gibberish all the time. What does a cellphone
>>> number have to do with a REST endpoint? Nothing!
>>>
>>> Its all locally and my laptop has no cellphone number:
>>>
>>> Start the REST API server
>>>
>>> To start the server, run the following command:
>>> lms server start
>>>
>>> Endpoints
>>>
>>> GET /api/v0/models
>>> List all loaded and downloaded models
>>> Example request
>>> curl -H "Authorization: Bearer $LM_API_TOKEN" 
>>> http://localhost:1234/api/v0/models
>>> Response format
>>> {
>>>    "object": "list",
>>>    "data": [
>>>      {
>>>        "id": "qwen2-vl-7b-instruct",
>>>        "object": "model",
>>>        "type": "vlm",
>>>        "publisher": "mlx-community",
>>>        "arch": "qwen2_vl"
>>> Etc...
>>> https://lmstudio.ai/docs/developer/rest/endpoints
>>>
>>> Bye
>>>
>>> BTW: LM Studio recently introduced LM Link,
>>> which provides some VPN. It can be used to
>>> create clients or servers that run models.
>>>
>>> It is end-to-end encrypted, and built on top
>>> of custom Tailscale mesh VPNs. This is for
>>> the paranoid, that want to acccess a
>>>
>>> LLM from one end of the globe, that sits
>>> on the other end of the globe, and have
>>> no evesdroper or whatever on the
>>>
>>> information that is exchanged.
> 

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#348196 — I have nothing to hide, you can find me in search.ch (Re: My Swift Go 16 AI has no IMEI, are you nuts?)

Hi,

Since I don't belong to some post CCCP,
cigaret smuggling cartell, I have nothing
to hide. If you are clever you find

my telefon number on search.ch. Whats
wrong with you? Do you sit in a asylum
for mentally disabled persons?

Bye

Mild Shock schrieb:
> Hi,
> 
> The IMEI (International Mobile Equipment Identity)
> is a 15-digit, globally unique serial number that
> identifies every mobile phone.
> 
> Most laptops do not have an IMEI number. It only
> exists if the device has an integrated cellular
> modem (WWAN/LTE/5G card) for SIM cards.
> 
> Also in Switzerland people have fiber optic earth
> cables for internet, and not some 5G over the air.
> I got like 10 GBit/s fiber here in my home.
> 
> There are 96 internet service providers that offer that speed:
> 
> https://www.comparis.ch/telecom/zuhause/angebote/list?requestobject={%22products%22%3A[1]%2C%22onlyOffersWithoutMinimumDuration%22%3Afalse%2C%22internetSpeedTypes%22%3A[1]%2C%22connectionTypes%22%3A[1]%2C%22tvOptions%22%3A[]%2C%22landlineOptions%22%3A[]%2C%22providers%22%3A[]%2C%22showDiscountedOnly%22%3Afalse%2C%22addressCheckInfo%22%3A{%22AvailableCableProviders%22%3Anull%2C%22AvailableVdslSpeed%22%3Anull%2C%22AvailableFiberSpeed%22%3Anull%2C%22AvailableInit7Fiber%22%3Afalse%2C%22AvailableAllFiberProvidersExceptInit7%22%3Afalse}%2C%22address%22%3A{%22Zip%22%3Anull%2C%22Street%22%3Anull%2C%22StreetNumber%22%3Anull}} 
> 
> Angebote für Internet, TV und Festnetz-Telefon, sowie Kombiangebote
> 
> Its handy to download LLMs which have GB sizes.
> 
> But this laptop has no SIM Card, even not a e-SIM:
> 
>  > How confused is tiny winy penis?
>  > For the 100th time the budget here:
>  >
>  > 11.4 Giga Lips with a Budget Laptop
>  > Ryzen AI 7 350 w/ Radeon 860M
>  > https://github.com/Jean-Luc-Picard-2021/gigabudget
>  >
>  > is a laptop and not a smartphone. It
>  > has no cellphone number. And w/ means
>  > integrated GPU on the silicon chip,
>  >
>  > and not a GPU connected to the mainboard
>  > via some PCI bus. The model is a acer
>  > swift go, I already posted this info:
>  >
>  > Swift Go 16 AI SFG16-61-R21J Notebook
>  > 
> https://www.acer.com/ch-de/laptops/swift/swift-go-16-ai-amd/pdp/NX.JCREZ.007 
> 
> 
> Bye
> 
> Roque Bahtinov schrieb:
>  > Mild Shock wrote:
>  >
>  >> Moron, from St. Petersburg, with only 5G internet.
>  >> You confuse browser security model with Google account.
>  >> No cellphone number involved in a brower JavaScript
>  >
>  > cretin, they already have your phone number, the IMEI, email adr, 
> location
>  > and everything, your friends included. Idiot, I cant even believe it.
>  >
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Moron, from St. Petersburg, with only 5G internet.
>> You confuse browser security model with Google account.
>> No cellphone number involved in a brower JavaScript
>>
>> secure sand box, for executing JavaScript in the main
>> and in isolated siloed workers. Also you seem not to see
>> that I post CHF price tags and CHF product listings.
>>
>> So what makes you think Switzerland == Germany,
>> when you rant like below. Even a dog knows that a
>> non-EU country cannot be the same as EU country:
>>
>>  > you stupid half german, the comparisons along
>>  > memories arrays gpu card located, are taking
>>  > place parallel without cpu intervention, you
>>  > fucking illiterate idiot. You soon will become a
>>  > quarter german hence 3/4 russian old days,
>>  > historically. It's coming
>>  >
>>  > German energy crisis caused by ‘lack of Russian gas’ – Merz
>>  > https://www.rt.com/news/643254-germany-crisis-russian-gas/
>>
>> Bye
>>
>> P.S.: EU = European Union
>>
>> Audie Balaban schrieb:
>>  > Mild Shock wrote:
>>  >
>>  >> Maybe you could post some subtantial critique moron? Instead of
>>  >> gibberish all the time. What does a cellphone number have to do 
>> with a
>>  >> REST endpoint? Nothing!
>>  >>
>>  >> Its all locally and my laptop has no cellphone number:
>>  >
>>  > you lying bitch, your arse is burning, you said google chrome 
>> security,
>>  > and gave them your cellphone number, fucking idiot. And you put wrong
>>  > ports numbers along the localhost: idiot
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Maybe you could post some subtantial critique moron?
>>> Instead of gibberish all the time. What does a cellphone
>>> number have to do with a REST endpoint? Nothing!
>>>
>>> Its all locally and my laptop has no cellphone number:
>>>
>>> Start the REST API server
>>>
>>> To start the server, run the following command:
>>> lms server start
>>>
>>> Endpoints
>>>
>>> GET /api/v0/models
>>> List all loaded and downloaded models
>>> Example request
>>> curl -H "Authorization: Bearer $LM_API_TOKEN" 
>>> http://localhost:1234/api/v0/models
>>> Response format
>>> {
>>>    "object": "list",
>>>    "data": [
>>>      {
>>>        "id": "qwen2-vl-7b-instruct",
>>>        "object": "model",
>>>        "type": "vlm",
>>>        "publisher": "mlx-community",
>>>        "arch": "qwen2_vl"
>>> Etc...
>>> https://lmstudio.ai/docs/developer/rest/endpoints
>>>
>>> Bye
>>>
>>> BTW: LM Studio recently introduced LM Link,
>>> which provides some VPN. It can be used to
>>> create clients or servers that run models.
>>>
>>> It is end-to-end encrypted, and built on top
>>> of custom Tailscale mesh VPNs. This is for
>>> the paranoid, that want to acccess a
>>>
>>> LLM from one end of the globe, that sits
>>> on the other end of the globe, and have
>>> no evesdroper or whatever on the
>>>
>>> information that is exchanged.
> 

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#348197 — Where did I confirm German via .ch, you are more than nuts! (Re: I have nothing to hide, you can find me in search.ch)

Hi,

 > I have nothing to hide,
 > you can find me in search.ch

Since when belongs .ch to German? The .ch
is the country code top-level domain (ccTLD)
for Switzerland in the Domain Name System
of the Internet.

If you want find proof of Germany, you
would need to see .de. That I use a German
usenet provider doesn't mean I am German.
Everybody can use solani.org.

Switzerland, SWITCH
https://en.wikipedia.org/wiki/.ch

Germany, DENIC
https://en.wikipedia.org/wiki/.de

nicht-kommerziellen Usenet-News-Server
https://solani.org/

Whats wrong with you?

Bye

Keiv Babenchikov schrieb:
 > Mild Shock wrote:
 >
 >> Since I don't belong to some post CCCP, cigaret smuggling cartell, I
 >> have nothing to hide. If you are clever you find
 >
 > hence you are admitting you are a fucking inbreed half german idiot from
 > birth. Thanks making it clearer.
 >

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#348198 — Ask a Ukrainian Neighbour to do Detective [CCCP Troll] (Re: Where did I confirm German via .ch, you are more than nuts! )

Hi,

Since the Vodka has burn all your brain cells,
ask a Ukrainian Neighbour to do Detective.

You might find people smarter than you, you
are already at the lower left end in the Gauss

curve, of an IQ suitable for software engineering.

Bye

Mild Shock schrieb:
> Hi,
> 
>  > I have nothing to hide,
>  > you can find me in search.ch
> 
> Since when belongs .ch to German? The .ch
> is the country code top-level domain (ccTLD)
> for Switzerland in the Domain Name System
> of the Internet.
> 
> If you want find proof of Germany, you
> would need to see .de. That I use a German
> usenet provider doesn't mean I am German.
> Everybody can use solani.org.
> 
> Switzerland, SWITCH
> https://en.wikipedia.org/wiki/.ch
> 
> Germany, DENIC
> https://en.wikipedia.org/wiki/.de
> 
> nicht-kommerziellen Usenet-News-Server
> https://solani.org/
> 
> Whats wrong with you?
> 
> Bye
> 
> Keiv Babenchikov schrieb:
>  > Mild Shock wrote:
>  >
>  >> Since I don't belong to some post CCCP, cigaret smuggling cartell, I
>  >> have nothing to hide. If you are clever you find
>  >
>  > hence you are admitting you are a fucking inbreed half german idiot from
>  > birth. Thanks making it clearer.
>  >

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#348173 — Re: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines] (Re: The Cache Identity Crisis by Micro Penis)

On 07/20/2026 12:26 PM, Ross Finlayson wrote:
> On 07/20/2026 05:10 AM, Mild Shock wrote:
>> Hi,
>>
>> If you don't know how GPU caches work.
>> Just RTFM the RDNA 3.5 specs! They have
>> some explanations in the docs, what jobs
>>
>> the GPU cache lines do, in relation to
>> what instructions:
>>
>> Abbreviation for ‘Read The Fucking Manual’.
>> http://www.catb.org/esr/jargon/html/R/RTFM.html
>>
>> Here some RDNA 4.0 specs (smaller GPUs):
>>
>> "RDNA4" Instruction Set Architecture
>> Reference Guide - 7-April-2025
>> https://docs.amd.com/v/u/en-US/rdna4-instruction-set-architecture
>>
>> Here some CDNA 4.0 specs (bigger GPUs):
>>
>> CDNA4 Instruction Set Architecture
>> Reference Guide - 5-August-2025
>> https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/instruction-set-architectures/amd-instinct-cdna4-instruction-set-architecture.pdf
>>
>>
>>
>> Bye
>>
>> But the difference between CDNA GPUs and
>> RDNA GPUs seems not to be that big, at least
>> in 2025:
>>
>> Commitment to High-Performance
>> Computing in the Age of AI
>> https://docs.amd.com/v/u/en-US/precision-at-scale-amd-whitepaper
>>
>> While the Copilot+ threshold is 45 TFLOPs,
>> a MI355X, Datacenter, rack-mounted, liquid cooling,
>> has surely more memory, but only 157 TFLOPS.
>>
>> And RTX 5090, Desktop, 600W+ TDP, massive cooling,
>> has also only 100 TFLOPS. So it looks these
>> Copilot+ AI Laptops are pretty swell, arent they?
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>>  > completely nonsense. Not even correct grammatically
>>>
>>> Yes of course, Micro Penis will know. Nothing, LoL
>>> But here we find how village idiot Micro Penis is.
>>> The Cache Identity Crisis by Micro Penis:
>>>
>>> Claiming that L1/L2/L3 caches and core
>>> topology are "embedded cpu registers area,
>>> it has nothing to do with the ram." That is
>>> a brilliant piece of hardware fiction.
>>>
>>> Caches are SRAM acting as a hierarchical
>>> staging ground for and backed by system
>>> or device RAM, not an alternate dimension
>>> divorced from memory entirely.
>>>
>>> And calling cache hierarchies "registers"
>>> is like confusing a warehouse parking lot
>>> with the glove compartment of a single car.
>>> Never heard of the crossbar in AMD GPUs?
>>>
>>> LoL
>>>
>>> Bye
>>>
>>> Obelin Baisaroff schrieb:
>>>  > Ross Finlayson wrote:
>>>  >
>>>  >> access to memory, has that these days with
>>>  >> L1/L2/L3 caches and the proximity and affinity
>>>  >> in the topology of the cores and
>>>  >
>>>  > those are embedded cpu registers area, it has
>>>  > nothing to do with the ram. Works by higher
>>>  > clocks compared, but merely useless in AI.
>>>  >
>>>
>>>
>>> Romelio Balakhonsky schrieb:
>>>  > Mild Shock wrote:
>>>  >
>>>  >> me about lazySet() in Java. But I went with set():
>>>  >>
>>>  >>       private static boolean enqueue(Queue q, Object data) {
>>>  >>           int pos = q.enqueuePos.get();
>>>  >>           for (; ; ) {
>>>  >>               int index = pos & q.bufferMask; int seq =
>>>  >>               q.sequences.get(index);
>>>  >>               int dif = seq - pos;
>>>  >>               if (dif == 0) {
>>>  >>                   if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
>>>  >>                       q.data[index] = data; q.sequences.set(index,
>>> pos +
>>>  >>                       1);
>>>  >>                       return true;
>>>  >>                   }
>>>  >>                   pos = q.enqueuePos.get();
>>>  >>               } else if (dif < 0) {
>>>  >>                   return false;
>>>  >>               } else {
>>>  >>                   pos = q.enqueuePos.get();
>>>  >>               }
>>>  >>           }
>>>  >>       }
>>>  >>
>>>  >> The above version seems to be more suitable for my purpose, since it
>>>  >> allows polling, it basically implements offer(). While the
>>>  >
>>>  > completely nonsense. Not even correct grammatically
>>>  >
>>>
>>
>
> Forget GPUs and forget you too.
>
>

Also forget your spammy sock-puppets
and the grimy, gropy mitts up in them.

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#348175 — rossy boy is going paranoid (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines])

Hi,

What sock puppets? Just look at the headers
of the source of my posts, its always:

From: Mild Shock <janburse@fastmail.fm>

Did corona burn out the last of your braincells,
and now rossy boy is going paranoid.

Or what is the meaning of your herpes blister
gibberish that you are regularly posting?

Bye

Ross Finlayson schrieb:
> Also forget your spammy sock-puppets
> and the grimy, gropy mitts up in them.

[toc] | [prev] | [next] | [standalone]

#348177 — Re: rossy boy is going paranoid (Was: Just RTFM the RDNA 3.5 specs! [GPU Cache Lines])

On 07/21/2026 12:01 AM, Mild Shock wrote:
> Hi,
>
> What sock puppets? Just look at the headers
> of the source of my posts, its always:
>
> From: Mild Shock <janburse@fastmail.fm>
>
> Did corona burn out the last of your braincells,
> and now rossy boy is going paranoid.
>
> Or what is the meaning of your herpes blister
> gibberish that you are regularly posting?
>
> Bye
>
> Ross Finlayson schrieb:
>> Also forget your spammy sock-puppets
>> and the grimy, gropy mitts up in them.
>

Life experience

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#348155 — L1,..,Ln caches are located on the CPU AND on the GPU (Was: The Cache Identity Crisis by Micro Penis(

Hi,

You are a moron right? Modern GPU has its
own L1,..,Ln caches. RTFM ASAP you brain
amputated vodka alcoholic.

Russian Hardbass - Crazy Dance
https://www.youtube.com/watch?v=6OoglRuT0jY

Bye

Jeiker Makulov schrieb:
 > Mild Shock wrote:
 >
 >> Yes of course, Micro Penis will know. Nothing, LoL But here we find how
 >> village idiot Micro Penis is.
 >> The Cache Identity Crisis by Micro Penis:
 >>
 >> Claiming that L1/L2/L3 caches and core topology are "embedded cpu
 >> registers area,
 >> it has nothing to do with the ram." That is a brilliant piece of
 >> hardware fiction.
 >>
 >> Caches are SRAM acting as a hierarchical
 >
 > imbecile, formatting code like that puts you in prison in normal
 > countries. You are using entire lines for single chars, ie  "}" etc,
 > imbecile.
 >
 > also, fucking lying illiterate imbecile
 >
 > L1, L2, and L3 caches are located on the CPU, not in the system RAM. They
 > form a high-speed memory hierarchy embedded directly within or 
immediately
 > adjacent to the processor cores to minimize data access latency.
 >

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#348156 — GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU)

Hi,

Just read something for once you alcoholic:

GPU Cache Hierarchy: Understanding L1, L2, and VRAM
https://charlesgrassi.dev/blog/gpu-cache-hierarchy/

Measuring Cache Efficiency

GPU profilers like NVIDIA Nsight, AMD Radeon
GPU Profiler, and RenderDoc expose cache hit
rates and memory throughput. Key metrics to watch:

- L1 Hit Rate: Should be >80% for well-optimized
     shaders. Below 60% indicates access pattern problems.
- L2 Hit Rate: Measures working set fit.
     Below 70% suggests texture thrashing or too many unique textures.
- Texture Memory Throughput: Compare to theoretical
     max. Low throughput with high latency = cache misses.
- Memory-bound vs Compute-bound: If memory is the
     bottleneck, cache optimization has highest impact.

If the GPU is a discrete GPU, it has VRAM,
If the GPU is an accelerator processing unit (APU),
it shares the system memory with the CPU.

In the APU scenrio often advanced unified memory
is used, which can be multi channel for example.
The high L1 and L2 hit rate for shaders, translates

also to pi-WAM. Which shows, in the example I used,
a quite good GPU saturation, less memory bound and
more compute bound. I have compute these figures already.

Bye

Mild Shock schrieb:
> 
> Hi,
> 
> You are a moron right? Modern GPU has its
> own L1,..,Ln caches. RTFM ASAP you brain
> amputated vodka alcoholic.
> 
> Russian Hardbass - Crazy Dance
> https://www.youtube.com/watch?v=6OoglRuT0jY
> 
> Bye
> 
> Jeiker Makulov schrieb:
>  > Mild Shock wrote:
>  >
>  >> Yes of course, Micro Penis will know. Nothing, LoL But here we find how
>  >> village idiot Micro Penis is.
>  >> The Cache Identity Crisis by Micro Penis:
>  >>
>  >> Claiming that L1/L2/L3 caches and core topology are "embedded cpu
>  >> registers area,
>  >> it has nothing to do with the ram." That is a brilliant piece of
>  >> hardware fiction.
>  >>
>  >> Caches are SRAM acting as a hierarchical
>  >
>  > imbecile, formatting code like that puts you in prison in normal
>  > countries. You are using entire lines for single chars, ie  "}" etc,
>  > imbecile.
>  >
>  > also, fucking lying illiterate imbecile
>  >
>  > L1, L2, and L3 caches are located on the CPU, not in the system RAM. 
> They
>  > form a high-speed memory hierarchy embedded directly within or 
> immediately
>  > adjacent to the processor cores to minimize data access latency.
>  >
> 

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#348159 — Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU)

Hi,

 > That's too located close to the same cpu, idiot.

Yes, colocating a CPU and GPU onto the same
processor die or package provides massive b
enefits, primarily by eliminating the latency
and bandwidth bottlenecks of moving data
across a motherboard.

Individual L1 Caches: Yes, the CPU cores and
the GPU compute units (Streaming Multiprocessors /
Compute Units) still maintain private,
individual L1 caches.

The "Colocation" Benefit: In traditional
setups (a separate CPU and GPU on PCIe slots),
data must be copied from system RAM to the
GPU's VRAM. When a CPU and GPU are colocated
(like in Apple Silicon, AMD APUs, or Intel
processors), they share a Unified Memory
Architecture (UMA). Both processors can read
and write to the exact same physical memory
pool without redundant data copying

Shared Last-Level Cache: While the L1 caches
remain separate, colocated architectures
often share a high-capacity Last-Level
Cache (L2 or L3). This allows the CPU and
GPU to quickly pass data back and forth
locally on the chip.

Bye

Mild Shock schrieb:
> Hi,
> 
> Just read something for once you alcoholic:
> 
> GPU Cache Hierarchy: Understanding L1, L2, and VRAM
> https://charlesgrassi.dev/blog/gpu-cache-hierarchy/
> 
> Measuring Cache Efficiency
> 
> GPU profilers like NVIDIA Nsight, AMD Radeon
> GPU Profiler, and RenderDoc expose cache hit
> rates and memory throughput. Key metrics to watch:
> 
> - L1 Hit Rate: Should be >80% for well-optimized
>      shaders. Below 60% indicates access pattern problems.
> - L2 Hit Rate: Measures working set fit.
>      Below 70% suggests texture thrashing or too many unique textures.
> - Texture Memory Throughput: Compare to theoretical
>      max. Low throughput with high latency = cache misses.
> - Memory-bound vs Compute-bound: If memory is the
>      bottleneck, cache optimization has highest impact.
> 
> If the GPU is a discrete GPU, it has VRAM,
> If the GPU is an accelerator processing unit (APU),
> it shares the system memory with the CPU.
> 
> In the APU scenrio often advanced unified memory
> is used, which can be multi channel for example.
> The high L1 and L2 hit rate for shaders, translates
> 
> also to pi-WAM. Which shows, in the example I used,
> a quite good GPU saturation, less memory bound and
> more compute bound. I have compute these figures already.
> 
> Bye
> 
> Mild Shock schrieb:
>>
>> Hi,
>>
>> You are a moron right? Modern GPU has its
>> own L1,..,Ln caches. RTFM ASAP you brain
>> amputated vodka alcoholic.
>>
>> Russian Hardbass - Crazy Dance
>> https://www.youtube.com/watch?v=6OoglRuT0jY
>>
>> Bye
>>
>> Jeiker Makulov schrieb:
>>  > Mild Shock wrote:
>>  >
>>  >> Yes of course, Micro Penis will know. Nothing, LoL But here we 
>> find how
>>  >> village idiot Micro Penis is.
>>  >> The Cache Identity Crisis by Micro Penis:
>>  >>
>>  >> Claiming that L1/L2/L3 caches and core topology are "embedded cpu
>>  >> registers area,
>>  >> it has nothing to do with the ram." That is a brilliant piece of
>>  >> hardware fiction.
>>  >>
>>  >> Caches are SRAM acting as a hierarchical
>>  >
>>  > imbecile, formatting code like that puts you in prison in normal
>>  > countries. You are using entire lines for single chars, ie  "}" etc,
>>  > imbecile.
>>  >
>>  > also, fucking lying illiterate imbecile
>>  >
>>  > L1, L2, and L3 caches are located on the CPU, not in the system 
>> RAM. They
>>  > form a high-speed memory hierarchy embedded directly within or 
>> immediately
>>  > adjacent to the processor cores to minimize data access latency.
>>  >
>>
> 

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#348160 — Where is micro penis mental error? (Re: Well thats good, co-location, onto the same processor die (Re: GPU Cache Hierarchy: Understanding L1, L2, and VRAM (Was: L1,..,Ln caches are located on the CPU AND on the GPU)

Hi,

Maybe micro penis thinks if   assign 50% of my
32 GB memory, i.e. 16 GB to the GPU. That
the CPU can not anymore access it?

Traditional Integrated GPUs: When you manually
carve out 16 GB for the GPU in the BIOS, you
are creating a hard software partition. The
system locks that 16 GB exclusively for the
GPU to ensure it always has video memory.
While the CPU is physically wired to those
RAM chips, the operating system's memory
manager blocks the CPU from using that 16 GB
for general applications to prevent crashes.

Modern Unified Memory:
If you are using a chip like an Apple M-series,
there is no fixed partition. The CPU and GPU share
a single pool of 32 GB. If the GPU needs 16 GB for
an AI model, it allocates it dynamically. The CPU
can still read and write to that exact same 16 GB
address space simultaneously using shared pointers,
completely eliminating the need to copy data back and forth.

Bye

Mild Shock schrieb:
> Hi,
> 
>  > That's too located close to the same cpu, idiot.
> 
> Yes, colocating a CPU and GPU onto the same
> processor die or package provides massive b
> enefits, primarily by eliminating the latency
> and bandwidth bottlenecks of moving data
> across a motherboard.
> 
> Individual L1 Caches: Yes, the CPU cores and
> the GPU compute units (Streaming Multiprocessors /
> Compute Units) still maintain private,
> individual L1 caches.
> 
> The "Colocation" Benefit: In traditional
> setups (a separate CPU and GPU on PCIe slots),
> data must be copied from system RAM to the
> GPU's VRAM. When a CPU and GPU are colocated
> (like in Apple Silicon, AMD APUs, or Intel
> processors), they share a Unified Memory
> Architecture (UMA). Both processors can read
> and write to the exact same physical memory
> pool without redundant data copying
> 
> Shared Last-Level Cache: While the L1 caches
> remain separate, colocated architectures
> often share a high-capacity Last-Level
> Cache (L2 or L3). This allows the CPU and
> GPU to quickly pass data back and forth
> locally on the chip.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> Just read something for once you alcoholic:
>>
>> GPU Cache Hierarchy: Understanding L1, L2, and VRAM
>> https://charlesgrassi.dev/blog/gpu-cache-hierarchy/
>>
>> Measuring Cache Efficiency
>>
>> GPU profilers like NVIDIA Nsight, AMD Radeon
>> GPU Profiler, and RenderDoc expose cache hit
>> rates and memory throughput. Key metrics to watch:
>>
>> - L1 Hit Rate: Should be >80% for well-optimized
>>      shaders. Below 60% indicates access pattern problems.
>> - L2 Hit Rate: Measures working set fit.
>>      Below 70% suggests texture thrashing or too many unique textures.
>> - Texture Memory Throughput: Compare to theoretical
>>      max. Low throughput with high latency = cache misses.
>> - Memory-bound vs Compute-bound: If memory is the
>>      bottleneck, cache optimization has highest impact.
>>
>> If the GPU is a discrete GPU, it has VRAM,
>> If the GPU is an accelerator processing unit (APU),
>> it shares the system memory with the CPU.
>>
>> In the APU scenrio often advanced unified memory
>> is used, which can be multi channel for example.
>> The high L1 and L2 hit rate for shaders, translates
>>
>> also to pi-WAM. Which shows, in the example I used,
>> a quite good GPU saturation, less memory bound and
>> more compute bound. I have compute these figures already.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>>
>>> Hi,
>>>
>>> You are a moron right? Modern GPU has its
>>> own L1,..,Ln caches. RTFM ASAP you brain
>>> amputated vodka alcoholic.
>>>
>>> Russian Hardbass - Crazy Dance
>>> https://www.youtube.com/watch?v=6OoglRuT0jY
>>>
>>> Bye
>>>
>>> Jeiker Makulov schrieb:
>>>  > Mild Shock wrote:
>>>  >
>>>  >> Yes of course, Micro Penis will know. Nothing, LoL But here we 
>>> find how
>>>  >> village idiot Micro Penis is.
>>>  >> The Cache Identity Crisis by Micro Penis:
>>>  >>
>>>  >> Claiming that L1/L2/L3 caches and core topology are "embedded cpu
>>>  >> registers area,
>>>  >> it has nothing to do with the ram." That is a brilliant piece of
>>>  >> hardware fiction.
>>>  >>
>>>  >> Caches are SRAM acting as a hierarchical
>>>  >
>>>  > imbecile, formatting code like that puts you in prison in normal
>>>  > countries. You are using entire lines for single chars, ie  "}" etc,
>>>  > imbecile.
>>>  >
>>>  > also, fucking lying illiterate imbecile
>>>  >
>>>  > L1, L2, and L3 caches are located on the CPU, not in the system 
>>> RAM. They
>>>  > form a high-speed memory hierarchy embedded directly within or 
>>> immediately
>>>  > adjacent to the processor cores to minimize data access latency.
>>>  >
>>>
>>
> 

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#348161 — I didn't find Futex in WebGPU / WGSL (Re: Gemini, DeepSeek, OpenAI all know Dmitriy V'jukov)

Hi,

I didn't find Futex in WebGPU / WGSL.
The website WebGPU fundamentals is on
GitHub. I did a search here:

https://github.com/webgpu/webgpufundamentals

In Java I can use Doug Leas queue.
In WebGPU / WGSL I will mostlikely
adopt Dmitry Vyukov , for a first stab.

Who is Doug lea?

He wrote Concurrent Programming in
Java: Design Principles and Patterns
https://en.wikipedia.org/wiki/Doug_Lea

He is behind most of the concurrency promitives
in Java. Including the array backed queue that
I tested. Remember the results I had:

public class DmitryVyukov
8 ms
public class DougLea
10 ms

Bye

Mild Shock schrieb:
> Hi,
> 
> Its actually quite amazing. Gemini, DeepSeek,
> OpenAI all know Dmitriy V'jukov. I have asked
> the IntelliJ integrated Freeium AI to generate
> 
> some code for me, I guess their service uses
> by default OpenAI (Codex), and had it reviewed
> by Gemini and DeepSeek. These AIs started lecturing
> 
> me about lazySet() in Java. But I went with set():
> 
>      private static boolean enqueue(Queue q, Object data) {
>          int pos = q.enqueuePos.get();
>          for (; ; ) {
>              int index = pos & q.bufferMask;
>              int seq = q.sequences.get(index);
>              int dif = seq - pos;
>              if (dif == 0) {
>                  if (q.enqueuePos.compareAndSet(pos, pos + 1)) {
>                      q.data[index] = data;
>                      q.sequences.set(index, pos + 1);
>                      return true;
>                  }
>                  pos = q.enqueuePos.get();
>              } else if (dif < 0) {
>                  return false;
>              } else {
>                  pos = q.enqueuePos.get();
>              }
>          }
>      }
> 
> The above version seems to be more suitable
> for my purpose, since it allows polling, it
> basically implements offer(). While the
> 
> version posted on in the lock free group
> by Chris M. Thomasson implements a spin wait
> blocking put() already.
> 
> But I didn't port it yet to JavaScript or WGSL.
> Currently busy with realizing a Worker facade
> in JavaScript for a CPU backend that will run
> 
> in both the browser and node.js.
> 
> Bye
> 
> Chris M. Thomasson schrieb:
>> On 7/19/2026 2:04 PM, Chris M. Thomasson wrote:
>>> I am friends with Dmitry Vyukov from way back, 23+ years ago. 
>>> Actually, I helped him find some bugs in Relacy when it was in 
>>> pre-alpha way back on comp.programming.threads. Also, I created some 
>>> neat eventcount algos, read all:
>>>
>>> https://gist.github.com/mratsim/04a29bdd98d6295acda4d0677c4d0041
>>>
>>> For starters... ;^)
>>
>>
>> also, I made a neat alteration to one of Dmitry Vyukov MPMC queues, 
>> check it out:
>>
>> https://groups.google.com/g/lock-free/c/acjQ3-89abE/m/a6-Di0GZsyEJ
>>
>> can you get to the link? Thanks. Read all. 
> 
> 
> Mild Shock schrieb:
>> Hi,
>>
>> I'm a spinner, I'm a sinner
>> I spin on CAS loops for my dinner
>> Some call it busy-wait, I call it fate
>> When the queue is empty, I just rotate
>>
>> 2 Producer threads, 2 Consumer threads
>> Each Producer generating 8192 items
>> the single common channel between
>> them 128 elements large.
>>
>> public class DmitryVyukov
>> 8 ms
>> public class DougLea
>> 10 ms
>>
>> On the Ryzen AI 7 350 which has 8 physical
>> cores with hyperthreading, making it 16
>> logical cores.
>>
>> LoL
>>
>> Bye
>>
>> See also:
>>
>> Producer-Consumer Queues by Dmitry Vyukov
>> https://sites.google.com/site/1024cores/home/lock-free-algorithms/queues
>>
>> Steve Miller Band - The Joker (Official Music Video)
>> https://www.youtube.com/watch?v=dV3AziKTBUo
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> Ok I was looking at this learning challenge,
>>> producing vector (y1,y2,y3,y4) from a vector
>>> (x1,x2,x3,x4), System R can do it via least square?
>>>
>>> | 0 0 0 1 |   | x1 |     | x4 |
>>> | 0 0 1 0 |   | x2 |  =  | x3 |
>>> | 0 1 0 0 |   | x3 |     | x2 |
>>> | 1 0 0 0 |   | x4 |     | x1 |
>>>
>>> How it started:
>>>
>>> "multiplicative RNNs arises naturally from a
>>> proof-theoretic interpretation of next-token
>>> prediction as nested intuitionistic implication"
>>> Paul Tarau - 2026
>>> https://arxiv.org/abs/2601.19915
>>>
>>> How its going:
>>>
>>> "Dave uses a PDP-11 to train a real Neural
>>> Network complete with Transformers and
>>> Attention so you can see them at their most basic."
>>> Mr. Taskmanager - 2026
>>> https://www.youtube.com/watch?v=OUE3FSIk46g
>>>
>>> We see Doctor Frankstein in action from
>>> the Bronze Age of Computing, producing
>>> a Humunkulus, the progenitor of todays
>>>
>>> Bulgakov Shuriks in the Hyperscale Age!
>>>
>>> Bye
>>>
>>> P.S.: My impression neither cut to the core, that
>>> this incredible transformer most likely
>>> produced this deterministic attention:
>>>
>>> | -1 | * | k | + | 5 | = | k' |
>>>
>>> Or differently expressed y_k = x_{5-k}.
>>>
>>> How did the transformer do it? It produced
>>> a neural network with 1216 parameters, but
>>> didn't use embeddings or polar encoding
>>>
>>> of positions. But if we strip the noise
>>> and denoise from the position encoding,
>>> the denoise is done via softmax. We somehow
>>>
>>> must get the above, right? I still need to
>>> verify my claim! BTW: The PDP-11 assembly
>>> from 1979 uses wider example not with n=4
>>>
>>> but with n=8.
>>
> 

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#348162 — There is no imageAtomicAdd in WGSL (Re: I didn't find Futex in WebGPU / WGSL)

Hi,

I am developing against WebGPU / WGSL.
An overview of WebGPU / WGSL is found here:

https://github.com/webgpu/webgpufundamentals

There is no imageAtomicAdd in WGSL.
imageAtomicAdd is from WebGL / GLSL.

These are two different things:

WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
WebGL / GLSL : Wrapper for OpenGL

Chris M. Thomasson schrieb:
 > imageAtomicAdd is a damn good one for accumulation buffers.

Mild Shock schrieb:
> Hi,
> 
> I didn't find Futex in WebGPU / WGSL.
> The website WebGPU fundamentals is on
> GitHub. I did a search here:
> 
> https://github.com/webgpu/webgpufundamentals
> 
> In Java I can use Doug Leas queue.
> In WebGPU / WGSL I will mostlikely
> adopt Dmitry Vyukov , for a first stab.
> 
> Who is Doug lea?
> 
> He wrote Concurrent Programming in
> Java: Design Principles and Patterns
> https://en.wikipedia.org/wiki/Doug_Lea
> 
> He is behind most of the concurrency promitives
> in Java. Including the array backed queue that
> I tested. Remember the results I had:
> 
> public class DmitryVyukov
> 8 ms
> public class DougLea
> 10 ms
> 
> Bye

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#348164 — OpenGL is dead. Apple said bye bye / Wayland Compositor (Re: There is no imageAtomicAdd in WGSL)

Hi,

Apple officially deprecated OpenGL and
OpenGL ES back in macOS 10.14 (Mojave) in
2018 and iOS 12, sunsetting native
support in favor of Metal.

And then in the Windows and Linux world,
for surface management, there is Wayland
Compositor. But new GPUs that share system
memory, also help here.

Open-Source Drivers (amdgpu & mesa):
Unlike NVIDIA's historical proprietary
hurdles, AMD's graphics drivers are fully
open-source and built directly into
the Linux kernel and Mesa.

Native GBM Support: AMD's driver stack
natively and cleanly implements GBM
(Generic Buffer Management) and DRM/KMS,
which is the exact standard modern
Wayland compositors (like GNOME/Mutter,
KDE/KWin, Sway, and Hyprland) rely on
to allocate buffers and manage displays.

Unified Memory (APU Advantage): Because
an AMD APU shares system RAM between
the CPU and the integrated GPU, zero-copy
buffer sharing under Wayland is
exceptionally efficient.

Bye

Mild Shock schrieb:
> Hi,
> 
> I am developing against WebGPU / WGSL.
> An overview of WebGPU / WGSL is found here:
> 
> https://github.com/webgpu/webgpufundamentals
> 
> There is no imageAtomicAdd in WGSL.
> imageAtomicAdd is from WebGL / GLSL.
> 
> These are two different things:
> 
> WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
> WebGL / GLSL : Wrapper for OpenGL
> 
> Chris M. Thomasson schrieb:
>  > imageAtomicAdd is a damn good one for accumulation buffers.
> 
> Mild Shock schrieb:
>> Hi,
>>
>> I didn't find Futex in WebGPU / WGSL.
>> The website WebGPU fundamentals is on
>> GitHub. I did a search here:
>>
>> https://github.com/webgpu/webgpufundamentals
>>
>> In Java I can use Doug Leas queue.
>> In WebGPU / WGSL I will mostlikely
>> adopt Dmitry Vyukov , for a first stab.
>>
>> Who is Doug lea?
>>
>> He wrote Concurrent Programming in
>> Java: Design Principles and Patterns
>> https://en.wikipedia.org/wiki/Doug_Lea
>>
>> He is behind most of the concurrency promitives
>> in Java. Including the array backed queue that
>> I tested. Remember the results I had:
>>
>> public class DmitryVyukov
>> 8 ms
>> public class DougLea
>> 10 ms
>>
>> Bye

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#348168 — Flogging a Dead Horse, OpenGL is EOL (Re: There is no imageAtomicAdd in WGSL)

Hi,

But I am nowhere using WebGL / GLSL.
The experiment here GPU versus CPU,
was done with WebGPU / WGSL:

11.4 Giga Lips with a Budget Laptop
https://github.com/Jean-Luc-Picard-2021/gigabudget

Parallel π-WAM: 1.7 Giga Lips on a CPU
https://medium.com/2989/8a984e75af44

I do not intend to redo the experiment
"gigabudget" with WebGL / GSLS. It would
appear to me like flogging a dead horse,

a technology that has reached EOL, namely
OpenGL which is in the phase of end of lifetime.

Bye

Mild Shock schrieb:
> Hi,
> 
> I am developing against WebGPU / WGSL.
> An overview of WebGPU / WGSL is found here:
> 
> https://github.com/webgpu/webgpufundamentals
> 
> There is no imageAtomicAdd in WGSL.
> imageAtomicAdd is from WebGL / GLSL.
> 
> These are two different things:
> 
> WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
> WebGL / GLSL : Wrapper for OpenGL
> 
> Chris M. Thomasson schrieb:
>  > imageAtomicAdd is a damn good one for accumulation buffers.
> 
> Mild Shock schrieb:
>> Hi,
>>
>> I didn't find Futex in WebGPU / WGSL.
>> The website WebGPU fundamentals is on
>> GitHub. I did a search here:
>>
>> https://github.com/webgpu/webgpufundamentals
>>
>> In Java I can use Doug Leas queue.
>> In WebGPU / WGSL I will mostlikely
>> adopt Dmitry Vyukov , for a first stab.
>>
>> Who is Doug lea?
>>
>> He wrote Concurrent Programming in
>> Java: Design Principles and Patterns
>> https://en.wikipedia.org/wiki/Doug_Lea
>>
>> He is behind most of the concurrency promitives
>> in Java. Including the array backed queue that
>> I tested. Remember the results I had:
>>
>> public class DmitryVyukov
>> 8 ms
>> public class DougLea
>> 10 ms
>>
>> Bye

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#348169 — imageAtomicAdd trivial, Dmitry Vyukov requires capacity (Re: Flogging a Dead Horse, OpenGL is EOL)

Hi,

imageAtomicAdd is trivial, but it does
not help with bounded buffers. I already
did imageAtomicAdd, in an experiment,

where pi-WAM implemented an in and out
buffer as follows in Java, which can
be trivially ported to WebGPU / WGSL,

by using atomic(i32) and AtomicAdd:

    private static final class PiChan {
         private int[] buf;
         private AtomicInteger pos;
     }

     private static final class PiWam {
         private PiChan in;
     Etc...
     }

    case 5: /* in */
         int at = pi.in.pos.getAndAdd(obj);
         for (int i = 0; i < obj; i++)
              pi.state[offset + i] = pi.in.buf[at + i];
         return 0;

But this is not the same like Dmitry
Vyukov buffer. Which has a maximum
capacity, and fails to go beyond this

capacity filling a buffer by a producer,
before a consumer made the buffer not
full again. My requirement for pi-WAM

are bounded buffers with a finite capacity.

Bye

Mild Shock schrieb:
> Hi,
> 
> But I am nowhere using WebGL / GLSL.
> The experiment here GPU versus CPU,
> was done with WebGPU / WGSL:
> 
> 11.4 Giga Lips with a Budget Laptop
> https://github.com/Jean-Luc-Picard-2021/gigabudget
> 
> Parallel π-WAM: 1.7 Giga Lips on a CPU
> https://medium.com/2989/8a984e75af44
> 
> I do not intend to redo the experiment
> "gigabudget" with WebGL / GSLS. It would
> appear to me like flogging a dead horse,
> 
> a technology that has reached EOL, namely
> OpenGL which is in the phase of end of lifetime.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> I am developing against WebGPU / WGSL.
>> An overview of WebGPU / WGSL is found here:
>>
>> https://github.com/webgpu/webgpufundamentals
>>
>> There is no imageAtomicAdd in WGSL.
>> imageAtomicAdd is from WebGL / GLSL.
>>
>> These are two different things:
>>
>> WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
>> WebGL / GLSL : Wrapper for OpenGL
>>
>> Chris M. Thomasson schrieb:
>>  > imageAtomicAdd is a damn good one for accumulation buffers.
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> I didn't find Futex in WebGPU / WGSL.
>>> The website WebGPU fundamentals is on
>>> GitHub. I did a search here:
>>>
>>> https://github.com/webgpu/webgpufundamentals
>>>
>>> In Java I can use Doug Leas queue.
>>> In WebGPU / WGSL I will mostlikely
>>> adopt Dmitry Vyukov , for a first stab.
>>>
>>> Who is Doug lea?
>>>
>>> He wrote Concurrent Programming in
>>> Java: Design Principles and Patterns
>>> https://en.wikipedia.org/wiki/Doug_Lea
>>>
>>> He is behind most of the concurrency promitives
>>> in Java. Including the array backed queue that
>>> I tested. Remember the results I had:
>>>
>>> public class DmitryVyukov
>>> 8 ms
>>> public class DougLea
>>> 10 ms
>>>
>>> Bye
> 

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#348170 — capacity = 2^n for some n / systolic system (Re: imageAtomicAdd trivial, Dmitry Vyukov requires capacity)

Hi,

I am still singing this song:

"I'm a spinner, I'm a sinner
I spin on CAS loops for my dinner
Some call it busy-wait, I call it fate
When the queue is empty, I just rotate"

In Dmitry Vyukov multiple producer and
multiple consuer, the assumption is
that the capacity is a multiple power

of 2. This way some inveriants hold
computing seq - pos, even of the i32
arithmetc overflows, the difference

will still be in the interval -capacity
... capacity , as the AI chat bot explained
me. The initialization of a Dmitry Vyukov

then doesn't store capacity itself, but
a mask derived from capacity:

     private static void init(Queue q, int size) {
         q.bufferMask = size - 1;
         q.sequences = new AtomicIntegerArray(size);
         for (int i = 0; i < size; i++)
             q.sequences.set(i, i);
         q.data = new Object[size];
         q.enqueuePos = new AtomicInteger(0);
         q.dequeuePos = new AtomicInteger(0);
     }

I cannot use imageAtomicAdd, which wouldn't
have a finite capacity. But as you see
I have already a prototype of a Queue

with a finite capacity. And the results
for a systolic system are quite good:

public class DmitryVyukov
8 ms
public class DougLea
10 ms

Have Fun!

Bye

Mild Shock schrieb:
> Hi,
> 
> imageAtomicAdd is trivial, but it does
> not help with bounded buffers. I already
> did imageAtomicAdd, in an experiment,
> 
> where pi-WAM implemented an in and out
> buffer as follows in Java, which can
> be trivially ported to WebGPU / WGSL,
> 
> by using atomic(i32) and AtomicAdd:
> 
>     private static final class PiChan {
>          private int[] buf;
>          private AtomicInteger pos;
>      }
> 
>      private static final class PiWam {
>          private PiChan in;
>      Etc...
>      }
> 
>     case 5: /* in */
>          int at = pi.in.pos.getAndAdd(obj);
>          for (int i = 0; i < obj; i++)
>               pi.state[offset + i] = pi.in.buf[at + i];
>          return 0;
> 
> But this is not the same like Dmitry
> Vyukov buffer. Which has a maximum
> capacity, and fails to go beyond this
> 
> capacity filling a buffer by a producer,
> before a consumer made the buffer not
> full again. My requirement for pi-WAM
> 
> are bounded buffers with a finite capacity.
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> But I am nowhere using WebGL / GLSL.
>> The experiment here GPU versus CPU,
>> was done with WebGPU / WGSL:
>>
>> 11.4 Giga Lips with a Budget Laptop
>> https://github.com/Jean-Luc-Picard-2021/gigabudget
>>
>> Parallel π-WAM: 1.7 Giga Lips on a CPU
>> https://medium.com/2989/8a984e75af44
>>
>> I do not intend to redo the experiment
>> "gigabudget" with WebGL / GSLS. It would
>> appear to me like flogging a dead horse,
>>
>> a technology that has reached EOL, namely
>> OpenGL which is in the phase of end of lifetime.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> I am developing against WebGPU / WGSL.
>>> An overview of WebGPU / WGSL is found here:
>>>
>>> https://github.com/webgpu/webgpufundamentals
>>>
>>> There is no imageAtomicAdd in WGSL.
>>> imageAtomicAdd is from WebGL / GLSL.
>>>
>>> These are two different things:
>>>
>>> WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
>>> WebGL / GLSL : Wrapper for OpenGL
>>>
>>> Chris M. Thomasson schrieb:
>>>  > imageAtomicAdd is a damn good one for accumulation buffers.
>>>
>>> Mild Shock schrieb:
>>>> Hi,
>>>>
>>>> I didn't find Futex in WebGPU / WGSL.
>>>> The website WebGPU fundamentals is on
>>>> GitHub. I did a search here:
>>>>
>>>> https://github.com/webgpu/webgpufundamentals
>>>>
>>>> In Java I can use Doug Leas queue.
>>>> In WebGPU / WGSL I will mostlikely
>>>> adopt Dmitry Vyukov , for a first stab.
>>>>
>>>> Who is Doug lea?
>>>>
>>>> He wrote Concurrent Programming in
>>>> Java: Design Principles and Patterns
>>>> https://en.wikipedia.org/wiki/Doug_Lea
>>>>
>>>> He is behind most of the concurrency promitives
>>>> in Java. Including the array backed queue that
>>>> I tested. Remember the results I had:
>>>>
>>>> public class DmitryVyukov
>>>> 8 ms
>>>> public class DougLea
>>>> 10 ms
>>>>
>>>> Bye
>>
> 

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#348171 — Source of the benchmark for DmitryVyukov (Was: capacity = 2^n for some n / systolic system)

     private static final int WORK = 8192;
     private static final int NECK = 128;

     private static void producer(Queue q) {
         for (int i = 0; i < WORK; i++) {
             Integer val = Integer.valueOf(i);
             while (!enqueue(q, val)) ;
         }
     }

     private static void consumer(Queue q) {
         for (;;) {
             Integer val;
             while ((val = (Integer) dequeue(q)) == null) ;
             if (val.intValue() == WORK-1)
                 break;
         }
     }

     public static void main(String[] args) throws InterruptedException {
         Queue q = new Queue();
         init(q, NECK);
         long tms = System.currentTimeMillis();
         Thread[] threads = new Thread[4];
         for (int i = 0; i < 4; i++) {
             Thread thread;
             if (i < 2) {
                 thread = new Thread(() -> producer(q));
             } else {
                 thread = new Thread(() -> consumer(q));
             }
             threads[i] = thread;
             thread.start();
         }
         for (int i = 0; i < 4; i++) {
             Thread thread = threads[i];
             thread.join();
         }
         System.out.println((System.currentTimeMillis() - tms)+" ms");
     }


Mild Shock schrieb:
> Hi,
> 
> I am still singing this song:
> 
> "I'm a spinner, I'm a sinner
> I spin on CAS loops for my dinner
> Some call it busy-wait, I call it fate
> When the queue is empty, I just rotate"
> 
> In Dmitry Vyukov multiple producer and
> multiple consuer, the assumption is
> that the capacity is a multiple power
> 
> of 2. This way some inveriants hold
> computing seq - pos, even of the i32
> arithmetc overflows, the difference
> 
> will still be in the interval -capacity
> ... capacity , as the AI chat bot explained
> me. The initialization of a Dmitry Vyukov
> 
> then doesn't store capacity itself, but
> a mask derived from capacity:
> 
>      private static void init(Queue q, int size) {
>          q.bufferMask = size - 1;
>          q.sequences = new AtomicIntegerArray(size);
>          for (int i = 0; i < size; i++)
>              q.sequences.set(i, i);
>          q.data = new Object[size];
>          q.enqueuePos = new AtomicInteger(0);
>          q.dequeuePos = new AtomicInteger(0);
>      }
> 
> I cannot use imageAtomicAdd, which wouldn't
> have a finite capacity. But as you see
> I have already a prototype of a Queue
> 
> with a finite capacity. And the results
> for a systolic system are quite good:
> 
> public class DmitryVyukov
> 8 ms
> public class DougLea
> 10 ms
> 
> Have Fun!
> 
> Bye
> 
> Mild Shock schrieb:
>> Hi,
>>
>> imageAtomicAdd is trivial, but it does
>> not help with bounded buffers. I already
>> did imageAtomicAdd, in an experiment,
>>
>> where pi-WAM implemented an in and out
>> buffer as follows in Java, which can
>> be trivially ported to WebGPU / WGSL,
>>
>> by using atomic(i32) and AtomicAdd:
>>
>>     private static final class PiChan {
>>          private int[] buf;
>>          private AtomicInteger pos;
>>      }
>>
>>      private static final class PiWam {
>>          private PiChan in;
>>      Etc...
>>      }
>>
>>     case 5: /* in */
>>          int at = pi.in.pos.getAndAdd(obj);
>>          for (int i = 0; i < obj; i++)
>>               pi.state[offset + i] = pi.in.buf[at + i];
>>          return 0;
>>
>> But this is not the same like Dmitry
>> Vyukov buffer. Which has a maximum
>> capacity, and fails to go beyond this
>>
>> capacity filling a buffer by a producer,
>> before a consumer made the buffer not
>> full again. My requirement for pi-WAM
>>
>> are bounded buffers with a finite capacity.
>>
>> Bye
>>
>> Mild Shock schrieb:
>>> Hi,
>>>
>>> But I am nowhere using WebGL / GLSL.
>>> The experiment here GPU versus CPU,
>>> was done with WebGPU / WGSL:
>>>
>>> 11.4 Giga Lips with a Budget Laptop
>>> https://github.com/Jean-Luc-Picard-2021/gigabudget
>>>
>>> Parallel π-WAM: 1.7 Giga Lips on a CPU
>>> https://medium.com/2989/8a984e75af44
>>>
>>> I do not intend to redo the experiment
>>> "gigabudget" with WebGL / GSLS. It would
>>> appear to me like flogging a dead horse,
>>>
>>> a technology that has reached EOL, namely
>>> OpenGL which is in the phase of end of lifetime.
>>>
>>> Bye
>>>
>>> Mild Shock schrieb:
>>>> Hi,
>>>>
>>>> I am developing against WebGPU / WGSL.
>>>> An overview of WebGPU / WGSL is found here:
>>>>
>>>> https://github.com/webgpu/webgpufundamentals
>>>>
>>>> There is no imageAtomicAdd in WGSL.
>>>> imageAtomicAdd is from WebGL / GLSL.
>>>>
>>>> These are two different things:
>>>>
>>>> WebGPU / WGSL : Wrapper for Vulcan, Direct 12, or Metal
>>>> WebGL / GLSL : Wrapper for OpenGL
>>>>
>>>> Chris M. Thomasson schrieb:
>>>>  > imageAtomicAdd is a damn good one for accumulation buffers.
>>>>
>>>> Mild Shock schrieb:
>>>>> Hi,
>>>>>
>>>>> I didn't find Futex in WebGPU / WGSL.
>>>>> The website WebGPU fundamentals is on
>>>>> GitHub. I did a search here:
>>>>>
>>>>> https://github.com/webgpu/webgpufundamentals
>>>>>
>>>>> In Java I can use Doug Leas queue.
>>>>> In WebGPU / WGSL I will mostlikely
>>>>> adopt Dmitry Vyukov , for a first stab.
>>>>>
>>>>> Who is Doug lea?
>>>>>
>>>>> He wrote Concurrent Programming in
>>>>> Java: Design Principles and Patterns
>>>>> https://en.wikipedia.org/wiki/Doug_Lea
>>>>>
>>>>> He is behind most of the concurrency promitives
>>>>> in Java. Including the array backed queue that
>>>>> I tested. Remember the results I had:
>>>>>
>>>>> public class DmitryVyukov
>>>>> 8 ms
>>>>> public class DougLea
>>>>> 10 ms
>>>>>
>>>>> Bye
>>>
>>
> 

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#348172 — Re: There is no imageAtomicAdd in WGSL (Re: I didn't find Futex in WebGPU / WGSL)

On 7/20/2026 3:15 PM, Mild Shock wrote:
[...]

Have you ever used imageAtomicAdd before?

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