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Groups > sci.electronics.design > #433534 > unrolled thread

ping Win, SiC fets

Started byJohn Larkin <jjlarkin@highlandtechnology.com>
First post2016-11-02 15:17 -0700
Last post2016-11-03 13:56 -0500
Articles 11 on this page of 31 — 13 participants

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  ping Win, SiC fets John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-02 15:17 -0700
    Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-02 15:36 -0700
      Re: ping Win, SiC fets John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-02 15:58 -0700
        Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-02 17:50 -0700
          Re: ping Win, SiC fets John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-02 18:02 -0700
            Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-02 18:34 -0700
              Re: ping Win, SiC fets TTman <pcw1.cad@ntlworld.com> - 2016-11-03 08:52 +0000
                Re: ping Win, SiC fets Martin Brown <|||newspam|||@nezumi.demon.co.uk> - 2016-11-03 09:24 +0000
                Re: ping Win, SiC fets Jeroen Belleman <jeroen@nospam.please> - 2016-11-03 10:25 +0100
                  Re: ping Win, SiC fets John S <Sophi.2@invalid.org> - 2016-11-03 07:11 -0500
                    Re: ping Win, SiC fets Jeroen Belleman <jeroen@nospam.please> - 2016-11-03 14:32 +0100
                      Re: ping Win, SiC fets Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2016-11-03 09:00 -0700
                      Re: ping Win, SiC fets John S <Sophi.2@invalid.org> - 2016-11-06 17:47 -0600
                Re: ping Win, SiC fets Tom Gardner <spamjunk@blueyonder.co.uk> - 2016-11-03 09:29 +0000
                  Re: ping Win, SiC fets TTman <pcw1.cad@ntlworld.com> - 2016-11-03 11:43 +0000
                    Re: ping Win, SiC fets Tom Gardner <spamjunk@blueyonder.co.uk> - 2016-11-03 12:16 +0000
                Re: ping Win, SiC fets upsidedown@downunder.com - 2016-11-03 18:56 +0200
              Re: ping Win, SiC fets John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-03 08:59 -0700
                Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-03 10:40 -0700
                  Re: ping Win, SiC fets John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-03 11:02 -0700
                    Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-03 11:29 -0700
    Re: ping Win, SiC fets dagmargoodboat@yahoo.com - 2016-11-02 15:42 -0700
      Re: ping Win, SiC fets John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-02 15:54 -0700
        Re: ping Win, SiC fets dagmargoodboat@yahoo.com - 2016-11-02 17:10 -0700
          Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-02 17:53 -0700
        Re: ping Win, SiC fets Winfield Hill <hill@rowland.harvard.edu> - 2016-11-02 17:54 -0700
          Re: ping Win, SiC fets Cursitor Doom <curd@notformail.com> - 2016-11-03 15:38 +0000
            triacs and electronics engineering Winfield Hill <hill@rowland.harvard.edu> - 2016-11-03 10:46 -0700
              Re: triacs and electronics engineering Gunther Heiko Hagen <guntherxxx@quantserve.de> - 2016-11-03 18:01 +0000
                Re: triacs and electronics engineering John Larkin <jjlarkin@highlandtechnology.com> - 2016-11-03 11:40 -0700
                Re: triacs and electronics engineering Jon Elson <jmelson@wustl.edu> - 2016-11-03 13:56 -0500

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#433698

FromWinfield Hill <hill@rowland.harvard.edu>
Date2016-11-03 11:29 -0700
Message-ID<nvfvm20koo@drn.newsguy.com>
In reply to#433692
John Larkin wrote...
>
> Can you reveal what you're using for gate drivers?

 Hah, I now have 6 different versions of the board,
 with six different gate-driver approaches, trying
 to reach my 10MHz repetition-rate goal.  I'm not
 happy with any of them.  My latest scheme gives up
 on TO-220 driver ICs, and uses a fast recent-vintage
 driver.  I suffer its poor thermal properties, and
 add NPN and PNP emitter-followers to handle some of
 the C V^2 f power dissipation.  Note that SiC MOSFETs
 have 1/4 the capacitance but require twice the gate
 voltage, hence 4x more power killing that advantage.
 The dissipation is now shared by two 1812 resistors,
 two sot-223 BJTs and the driver IC.  The latter has
 a heatsink.


-- 
 Thanks,
    - Win

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#433538

Fromdagmargoodboat@yahoo.com
Date2016-11-02 15:42 -0700
Message-ID<b80c9d00-dd8d-4cdb-84e0-0f1e115c765b@googlegroups.com>
In reply to#433534
On Wednesday, November 2, 2016 at 6:18:06 PM UTC-4, John Larkin wrote:
> Hey, Win,
> 
> I think you were working with high-voltage SiC fets.
> 
> What sort of fall times can you get at 1KV or so?
> 
> I want to switch 6 or 7 KV to ground, fast, into a 50 ohm load, and
> need to stack fets. The higher the fet voltage, the fewer I need to
> stack and drive.
> 
> 
> -- 
> 
> John Larkin         Highland Technology, Inc
> picosecond timing   precision measurement 
> 
> jlarkin att highlandtechnology dott com
> http://www.highlandtechnology.com

Just between us chickens, I'm eyeballing this one for an upcoming task...

http://www.wolfspeed.com/media/downloads/820/C2M1000170J.pdf


Cheers,
James Arthur

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#433540

FromJohn Larkin <jjlarkin@highlandtechnology.com>
Date2016-11-02 15:54 -0700
Message-ID<nhrk1cdc1j99dktt0p338dcbvumkbb3e8p@4ax.com>
In reply to#433538
On Wed, 2 Nov 2016 15:42:44 -0700 (PDT), dagmargoodboat@yahoo.com
wrote:

>On Wednesday, November 2, 2016 at 6:18:06 PM UTC-4, John Larkin wrote:
>> Hey, Win,
>> 
>> I think you were working with high-voltage SiC fets.
>> 
>> What sort of fall times can you get at 1KV or so?
>> 
>> I want to switch 6 or 7 KV to ground, fast, into a 50 ohm load, and
>> need to stack fets. The higher the fet voltage, the fewer I need to
>> stack and drive.
>> 
>> 
>> -- 
>> 
>> John Larkin         Highland Technology, Inc
>> picosecond timing   precision measurement 
>> 
>> jlarkin att highlandtechnology dott com
>> http://www.highlandtechnology.com
>
>Just between us chickens, I'm eyeballing this one for an upcoming task...
>
>http://www.wolfspeed.com/media/downloads/820/C2M1000170J.pdf
>
>
>Cheers,
>James Arthur

SiC tends to have high gate resistance, 25 ohms for that one. That
would make it hard to drive fast.

And I'm not a chicken. Quack.


-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

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#433549

Fromdagmargoodboat@yahoo.com
Date2016-11-02 17:10 -0700
Message-ID<61cdaca5-9e6a-4927-a0b1-a7a4952482aa@googlegroups.com>
In reply to#433540
On Wednesday, November 2, 2016 at 6:54:27 PM UTC-4, John Larkin wrote:
> On Wed, 2 Nov 2016 15:42:44 -0700 (PDT), dagmargoodboat@yahoo.com
> wrote:
> 
> >On Wednesday, November 2, 2016 at 6:18:06 PM UTC-4, John Larkin wrote:
> >> Hey, Win,
> >> 
> >> I think you were working with high-voltage SiC fets.
> >> 
> >> What sort of fall times can you get at 1KV or so?
> >> 
> >> I want to switch 6 or 7 KV to ground, fast, into a 50 ohm load, and
> >> need to stack fets. The higher the fet voltage, the fewer I need to
> >> stack and drive.
> >> 
> >> 
> >> -- 
> >> 
> >> John Larkin         Highland Technology, Inc
> >> picosecond timing   precision measurement 
> >> 
> >> jlarkin att highlandtechnology dott com
> >> http://www.highlandtechnology.com
> >
> >Just between us chickens, I'm eyeballing this one for an upcoming task...
> >
> >http://www.wolfspeed.com/media/downloads/820/C2M1000170J.pdf
> >
>
> 
> SiC tends to have high gate resistance, 25 ohms for that one. That
> would make it hard to drive fast.

I'd have to transiently over-drive Vgs hard to turn it off quickly, which
might kill it.  Folks do that with MOSFETs to overcome gate inductance--
hard, high pulse, then back off the overdrive before the die ever sees
the overvoltage.

The literature recommends negative Vgs to keep SiC FETs fully off, and
+20V 'on.' Funky.

> And I'm not a chicken. Quack.

Honk!  (They're flying over head these days, headed south)

Cheers,
James Arthur

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#433554

FromWinfield Hill <hill@rowland.harvard.edu>
Date2016-11-02 17:53 -0700
Message-ID<nve1pv0da4@drn.newsguy.com>
In reply to#433549
dagmargoodboat@yahoo.com wrote...
>
> The literature recommends negative Vgs to keep
> SiC FETs fully off, and +20V 'on.' Funky.

 I'm driving my SiC with +16 and -3.5 volts. 
 This gives me an acceptable-low Rds(on) and
 is a tad bit faster than the higher spec'd
 voltages.  Observed Vth = 10V.


-- 
 Thanks,
    - Win

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#433555

FromWinfield Hill <hill@rowland.harvard.edu>
Date2016-11-02 17:54 -0700
Message-ID<nve1sr0deh@drn.newsguy.com>
In reply to#433540
John Larkin wrote...
>
> SiC tends to have high gate resistance, 25 ohms for
> that one. That would make it hard to drive fast.

 I've seen those high numbers in the datasheets,
 but my measured performance shows they're wrong,
 at least for my parts.


-- 
 Thanks,
    - Win

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#433634

FromCursitor Doom <curd@notformail.com>
Date2016-11-03 15:38 +0000
Message-ID<nvfllf$8kd$2@dont-email.me>
In reply to#433555
On Wed, 02 Nov 2016 17:54:51 -0700, Winfield Hill wrote:

> John Larkin wrote...
>>
>> SiC tends to have high gate resistance, 25 ohms for that one. That
>> would make it hard to drive fast.
> 
>  I've seen those high numbers in the datasheets, but my measured
>  performance shows they're wrong,
>  at least for my parts.

Win, do you cover triacs in your new edition? I was gobsmacked to find 
there was not even a mention of them in the 2nd for some unaccountable 
reason. A *very* rare oversight on your part, though, I freely admit.

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#433679 — triacs and electronics engineering

FromWinfield Hill <hill@rowland.harvard.edu>
Date2016-11-03 10:46 -0700
Subjecttriacs and electronics engineering
Message-ID<nvft5b0fb8@drn.newsguy.com>
In reply to#433634
Cursitor Doom wrote...
>
> Win, do you cover triacs in your new edition?
> I was gobsmacked to find there was not even a
> mention of them in the 2nd for some unaccountable 
> reason. A *very* rare oversight on your part,
> though, I freely admit.

 Hey, triacs are for *electrical* engineering,
 and we're into *electronic* engineering.  But,
 yes, this time there's some basic info and part
 numbers for interfacing to triac line switches.


-- 
 Thanks,
    - Win

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#433691 — Re: triacs and electronics engineering

FromGunther Heiko Hagen <guntherxxx@quantserve.de>
Date2016-11-03 18:01 +0000
SubjectRe: triacs and electronics engineering
Message-ID<nvfu1t$8kd$10@dont-email.me>
In reply to#433679
On Thu, 03 Nov 2016 10:46:19 -0700, Winfield Hill wrote:

>  Hey, triacs are for *electrical* engineering, and we're into
>  *electronic* engineering. 

Oohh. Controversial territory! :->

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#433702 — Re: triacs and electronics engineering

FromJohn Larkin <jjlarkin@highlandtechnology.com>
Date2016-11-03 11:40 -0700
SubjectRe: triacs and electronics engineering
Message-ID<g41n1c51h6a2qi73qn51r2kj50o6g24m3j@4ax.com>
In reply to#433691
On Thu, 3 Nov 2016 18:01:33 -0000 (UTC), Gunther Heiko Hagen
<guntherxxx@quantserve.de> wrote:

>On Thu, 03 Nov 2016 10:46:19 -0700, Winfield Hill wrote:
>
>>  Hey, triacs are for *electrical* engineering, and we're into
>>  *electronic* engineering. 
>
>Oohh. Controversial territory! :->

The Art of Jumper Cables.


-- 

John Larkin         Highland Technology, Inc
picosecond timing   precision measurement 

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

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#433705 — Re: triacs and electronics engineering

FromJon Elson <jmelson@wustl.edu>
Date2016-11-03 13:56 -0500
SubjectRe: triacs and electronics engineering
Message-ID<lcydnRI2iskiGobFnZ2dnUU7-UudnZ2d@giganews.com>
In reply to#433691
Gunther Heiko Hagen wrote:

> On Thu, 03 Nov 2016 10:46:19 -0700, Winfield Hill wrote:
> 
>>  Hey, triacs are for *electrical* engineering, and we're into
>>  *electronic* engineering.
> 
> Oohh. Controversial territory! :->
Wow, I thought that war had been settled in the 1960's!

Jon

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