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Need to construct the logical reverse of a 7448 - perhaps using a GAL

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  Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-08 17:20 -0700
    Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jeff Liebermann <jeffl@cruzio.com> - 2018-10-08 18:57 -0700
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-08 19:08 -0700
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-08 19:13 -0700
        Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-08 19:27 -0700
          Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jeff Liebermann <jeffl@cruzio.com> - 2018-10-08 21:06 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jeff Liebermann <jeffl@cruzio.com> - 2018-10-08 21:36 -0700
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL gnuarm.deletethisbit@gmail.com - 2018-10-08 20:27 -0700
        Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-08 21:19 -0700
          Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jeff Liebermann <jeffl@cruzio.com> - 2018-10-08 21:40 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 00:20 -0700
              Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL gnuarm.deletethisbit@gmail.com - 2018-10-10 15:43 -0700
                Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-10 18:46 -0700
          Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL gnuarm.deletethisbit@gmail.com - 2018-10-08 22:11 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 00:27 -0700
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Rob <nomail@example.com> - 2018-10-09 17:08 +0000
    Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL "tom" <tmiller11147@verizon.net> - 2018-10-09 00:15 -0400
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 00:26 -0700
        Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2018-10-09 14:23 +0200
          Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL jrwalliker@gmail.com - 2018-10-09 06:43 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 08:41 -0700
              Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL dplatt@coop.radagast.org (Dave Platt) - 2018-10-09 10:50 -0700
        Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jeff Liebermann <jeffl@cruzio.com> - 2018-10-09 09:15 -0700
          Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 10:01 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2018-10-09 21:01 +0300
              Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 11:13 -0700
                Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL bitrex <user@example.net> - 2018-10-09 18:35 -0400
                  Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL TTman <kraken.sankey@gmail.com> - 2018-10-09 23:43 +0100
                    Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL bitrex <user@example.net> - 2018-10-09 19:49 -0400
                      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL bitrex <user@example.net> - 2018-10-09 19:50 -0400
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jeff Liebermann <jeffl@cruzio.com> - 2018-10-09 17:25 -0700
              Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 19:15 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL gnuarm.deletethisbit@gmail.com - 2018-10-10 16:46 -0700
              Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2018-10-11 02:08 +0200
                Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL gnuarm.deletethisbit@gmail.com - 2018-10-10 18:37 -0700
                  Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2018-10-11 13:35 +0200
        Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL gnuarm.deletethisbit@gmail.com - 2018-10-10 15:45 -0700
          Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-10 18:50 -0700
            Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL Jasen Betts <jasen@xnet.co.nz> - 2018-10-11 05:39 +0000
    Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL bitrex <user@example.net> - 2018-10-09 02:18 -0400
    Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL TTman <kraken.sankey@gmail.com> - 2018-10-09 17:51 +0100
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL bitrex <user@example.net> - 2018-10-09 17:38 -0400
    Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Larkin <jjlarkin@highland_snip_technology.com> - 2018-10-09 17:52 -0700
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL John Robertson <spam@flippers.com> - 2018-10-09 19:16 -0700
      Re: Need to construct the logical reverse of a 7448 - perhaps using a GAL bitrex <user@example.net> - 2018-10-09 22:48 -0400

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#518768 — Need to construct the logical reverse of a 7448 - perhaps using a GAL

I am looking for a way to take the TTL level outputs (treating them as 
inputs) of a 7448 and convert them back to the original BCD TTL input 
levels (but as outputs) and I figured a simple socketed GAL would do the 
trick for the least cost. However I don't have the skill set to build 
the GAL logic table for this. Any suggestions? And no, I can't simply 
remove the 7448 from the circuit.

Go easy on me here, I can unscrew hardware, but Boolean has never been 
my forte...

Thanks!

John :-#)#
-- 
(Please post followups or tech inquiries to the USENET newsgroup)
                      John's Jukes Ltd.
MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3
          (604)872-5757 (Pinballs, Jukes, Video Games)
                      www.flippers.com
        "Old pinballers never die, they just flip out."

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#518771

On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
wrote:

>I am looking for a way to take the TTL level outputs (treating them as 
>inputs) of a 7448 and convert them back to the original BCD TTL input 
>levels (but as outputs) and I figured a simple socketed GAL would do the 
>trick for the least cost. However I don't have the skill set to build 
>the GAL logic table for this. Any suggestions? And no, I can't simply 
>remove the 7448 from the circuit.
>
>Go easy on me here, I can unscrew hardware, but Boolean has never been 
>my forte...

Ok, a 7 segment display to BCD converter.
<http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
be sufficient to produce a PLA or SSI implementation.  

So, do I get a finders fee?

-- 
Jeff Liebermann     jeffl@cruzio.com
150 Felker St #D    http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann     AE6KS    831-336-2558

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#518772

On 2018/10/08 6:57 PM, Jeff Liebermann wrote:
> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
> wrote:
> 
>> I am looking for a way to take the TTL level outputs (treating them as
>> inputs) of a 7448 and convert them back to the original BCD TTL input
>> levels (but as outputs) and I figured a simple socketed GAL would do the
>> trick for the least cost. However I don't have the skill set to build
>> the GAL logic table for this. Any suggestions? And no, I can't simply
>> remove the 7448 from the circuit.
>>
>> Go easy on me here, I can unscrew hardware, but Boolean has never been
>> my forte...
> 
> Ok, a 7 segment display to BCD converter.
> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
> be sufficient to produce a PLA or SSI implementation.
> 
> So, do I get a finders fee?
> 

That was fast, Jeff! Did you whip that up just now? I am impressed.

Dinner on me next time you are in Vancouver, BC! Or a donation to your 
favourite charity perhaps?

John :-#)#

-- 
(Please post followups or tech inquiries to the USENET newsgroup)
                      John's Jukes Ltd.
MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3
          (604)872-5757 (Pinballs, Jukes, Video Games)
                      www.flippers.com
        "Old pinballers never die, they just flip out."

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#518773

On 2018/10/08 6:57 PM, Jeff Liebermann wrote:
> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
> wrote:
> 
>> I am looking for a way to take the TTL level outputs (treating them as
>> inputs) of a 7448 and convert them back to the original BCD TTL input
>> levels (but as outputs) and I figured a simple socketed GAL would do the
>> trick for the least cost. However I don't have the skill set to build
>> the GAL logic table for this. Any suggestions? And no, I can't simply
>> remove the 7448 from the circuit.
>>
>> Go easy on me here, I can unscrew hardware, but Boolean has never been
>> my forte...
> 
> Ok, a 7 segment display to BCD converter.
> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
> be sufficient to produce a PLA or SSI implementation.
> 
> So, do I get a finders fee?
> 

Opps, I did not define the parameters correctly - it is the full 7448 
table, minus the Lamp Test that is needed 0 - 15. I think I can figure 
the extra alpha characters from what you have provided.

Thanks again,

John :-#)#

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#518774

On 2018/10/08 7:13 PM, John Robertson wrote:
> On 2018/10/08 6:57 PM, Jeff Liebermann wrote:
>> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
>> wrote:
>>
>>> I am looking for a way to take the TTL level outputs (treating them as
>>> inputs) of a 7448 and convert them back to the original BCD TTL input
>>> levels (but as outputs) and I figured a simple socketed GAL would do the
>>> trick for the least cost. However I don't have the skill set to build
>>> the GAL logic table for this. Any suggestions? And no, I can't simply
>>> remove the 7448 from the circuit.
>>>
>>> Go easy on me here, I can unscrew hardware, but Boolean has never been
>>> my forte...
>>
>> Ok, a 7 segment display to BCD converter.
>> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
>> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
>> be sufficient to produce a PLA or SSI implementation.
>>
>> So, do I get a finders fee?
>>
> 
> Opps, I did not define the parameters correctly - it is the full 7448 
> table, minus the Lamp Test that is needed 0 - 15. I think I can figure 
> the extra alpha characters from what you have provided.
> 
> Thanks again,
> 
> John :-#)#

And I see now that this was built by three other guys: Imran Khan, 
Jabbar Khan, and Kaved Iqbal. Perhaps some thought exercise? The tables 
show up in a few places, but haven't found the original and the bottom 
of the schematic appears to be clipped.

Still it gives me enough to work with and I can fill in the rest. Mostly 
it is getting the correct place to start that screws me up...

Jeff, I'll still buy you a dinner if you get up to Vancouver, BC area!

John :-#)#

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#518782

On Mon, 8 Oct 2018 19:27:04 -0700, John Robertson <spam@flippers.com>
wrote:

>And I see now that this was built by three other guys: Imran Khan, 
>Jabbar Khan, and Kaved Iqbal. Perhaps some thought exercise? The tables 
>show up in a few places, but haven't found the original and the bottom 
>of the schematic appears to be clipped.

Switch to full screen view and the bottom of the tables and schematics
will magically appear.  

I think the original was a powerpoint presentation, but I didn't
bother trying to find it.  I'll do some digging and post what I find
after I extract all the wood splinters from my hands.  Searching for
the 3 authors names, or an image search by one of the graphics pages
should work.

>Still it gives me enough to work with and I can fill in the rest. Mostly 
>it is getting the correct place to start that screws me up...
>
>Jeff, I'll still buy you a dinner if you get up to Vancouver, BC area!

Probably not, but I do have some friends along the way I wouldn't mind
visiting.


-- 
Jeff Liebermann     jeffl@cruzio.com
150 Felker St #D    http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann     AE6KS    831-336-2558

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#518787

On Mon, 08 Oct 2018 21:06:13 -0700, Jeff Liebermann <jeffl@cruzio.com>
wrote:

>I think the original was a powerpoint presentation, but I didn't
>bother trying to find it.  I'll do some digging and post what I find
>after I extract all the wood splinters from my hands.

Here's the original PPT presentation:
<https://www.slideserve.com/tasha-bullock/7-segment-to-bcd-converter>

You can download the presentation as JPG's.  Scroll down to
"Presentation Transcript".  Click on the titles of each page that are
to the right of the thumbnail image.  You should get a JPG of each
page.  Back to pulling splinters (don't ask what I did wrong this
time).

The schematic does look like the bottom is cut off, but it's not.
Those 7 lines are the 7 input lines drawn as a bus.  There's nothing
connected to them below the bottom of the page where they end.



-- 
Jeff Liebermann     jeffl@cruzio.com
150 Felker St #D    http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann     AE6KS    831-336-2558

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#518780

On Monday, October 8, 2018 at 9:57:49 PM UTC-4, Jeff Liebermann wrote:
> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
> wrote:
> 
> >I am looking for a way to take the TTL level outputs (treating them as 
> >inputs) of a 7448 and convert them back to the original BCD TTL input 
> >levels (but as outputs) and I figured a simple socketed GAL would do the 
> >trick for the least cost. However I don't have the skill set to build 
> >the GAL logic table for this. Any suggestions? And no, I can't simply 
> >remove the 7448 from the circuit.
> >
> >Go easy on me here, I can unscrew hardware, but Boolean has never been 
> >my forte...
> 
> Ok, a 7 segment display to BCD converter.
> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
> be sufficient to produce a PLA or SSI implementation.  
> 
> So, do I get a finders fee?

This logic diagram is not optimal.  I guess a Karnaugh map for 7 inputs is not so easy to draw.  I was thinking about this recently.  When I was in school they taught Karnaugh maps because you would use them from time to time.  Later they taught Karnaugh maps because you needed to know how they worked so you could potentially write your own minimization programs I suppose.  I expect they barely teach Karnaugh maps because there is tons of software around to do this for you much as they don't emphasize simple arithmetic when you will likely use a calculator.  

I think this is a lot simpler to construct from SSI than the diagram shown.  Or maybe a very few MSI devices could be used.  Or mux logic (which I was taught in school) could be used much as is done in FPGAs.  I haven't checked, but I bet this could be done with maybe six devices. 

Rick C.

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#518784

On 2018/10/08 8:27 PM, gnuarm.deletethisbit@gmail.com wrote:
> On Monday, October 8, 2018 at 9:57:49 PM UTC-4, Jeff Liebermann wrote:
>> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
>> wrote:
>>
>>> I am looking for a way to take the TTL level outputs (treating them as
>>> inputs) of a 7448 and convert them back to the original BCD TTL input
>>> levels (but as outputs) and I figured a simple socketed GAL would do the
>>> trick for the least cost. However I don't have the skill set to build
>>> the GAL logic table for this. Any suggestions? And no, I can't simply
>>> remove the 7448 from the circuit.
>>>
>>> Go easy on me here, I can unscrew hardware, but Boolean has never been
>>> my forte...
>>
>> Ok, a 7 segment display to BCD converter.
>> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
>> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
>> be sufficient to produce a PLA or SSI implementation.
>>
>> So, do I get a finders fee?
> 
> This logic diagram is not optimal.  I guess a Karnaugh map for 7 inputs is not so easy to draw.  I was thinking about this recently.  When I was in school they taught Karnaugh maps because you would use them from time to time.  Later they taught Karnaugh maps because you needed to know how they worked so you could potentially write your own minimization programs I suppose.  I expect they barely teach Karnaugh maps because there is tons of software around to do this for you much as they don't emphasize simple arithmetic when you will likely use a calculator.
> 
> I think this is a lot simpler to construct from SSI than the diagram shown.  Or maybe a very few MSI devices could be used.  Or mux logic (which I was taught in school) could be used much as is done in FPGAs.  I haven't checked, but I bet this could be done with maybe six devices.
> 
> Rick C.
> 

My thought was to trick a GAL into being essentially a ROM lookup table. 
should be enough gates inside for that.

Using the link Jeff provided I have adapted the boolean equations that I 
am hoping can be further simplified, (f' = NOT-f), but I am done for now:

W = abcdfg + bcdef’g + a’b’cdefg + a’b’c’def’g’ + abc’defg + ab’c’d’efg

X = ab’cdfg+ a’bcd’e’fg+ abcd’e’f’g’ + a’b’c’def’g’ + a’bcdef’g + 
abc’defg + ab’c’d’efg

Y = abc’deg + abcdf’g + ab’cdefg + abcd’e’f’g’ + abcdef’g + a’b’cdefg + 
ab’c’d’efg

Z = bcd’e’f’g’+ abcde’g+ ab’cde’fg + a’b’cdefg + a’bcdef’g + ab’c’d’efg

Truth table can't display it here, so I put it here:

ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth-table.png

John :-#)#

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#518788

On Mon, 8 Oct 2018 21:19:16 -0700, John Robertson <spam@flippers.com>
wrote:


>Truth table can't display it here, so I put it here:
>ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth-table.png

550 no such directory.

-- 
Jeff Liebermann     jeffl@cruzio.com
150 Felker St #D    http://www.LearnByDestroying.com
Santa Cruz CA 95060 http://802.11junk.com
Skype: JeffLiebermann     AE6KS    831-336-2558

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#518802

On 2018/10/08 9:40 PM, Jeff Liebermann wrote:
> On Mon, 8 Oct 2018 21:19:16 -0700, John Robertson <spam@flippers.com>
> wrote:
> 
> 
>> Truth table can't display it here, so I put it here:
>> ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth-table.png
> 
> 550 no such directory.
> 

Crap, this is correct:

https://flippers.com/images/temp/7-segment-to-BCD-truth-table.png

Thanks,

John :-#)#

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#518905

On Tuesday, October 9, 2018 at 3:21:01 AM UTC-4, John Robertson wrote:
> On 2018/10/08 9:40 PM, Jeff Liebermann wrote:
> > On Mon, 8 Oct 2018 21:19:16 -0700, John Robertson <spam@flippers.com>
> > wrote:
> > 
> > 
> >> Truth table can't display it here, so I put it here:
> >> ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth-table.png
> > 
> > 550 no such directory.
> > 
> 
> Crap, this is correct:
> 
> https://flippers.com/images/temp/7-segment-to-BCD-truth-table.png

Trouble is this truth table doesn't show the don't care states of which there are 112 of them.  This will let you highly optimize the equations you want to implement and might well let you use some pretty simple SSI/MSI logic.  Of course if you are targeting a PLD a tool can do this for you.  But then this table is not as useful as a simple case statement.  

Many HDL compilers will implement don't cares by assignments of the value '-'.  Assuming the lit segments are logic lows, the important code becomes... 

signal CharSegs unsigned(6 downto 0);
signal CharHex unsigned(3 downto 0); 

process (CharSegs)
BEGIN
    case CharSegs is
        when "0000001" => CharHex <= "0000";  -- '0'
        when "1001111" => CharHex <= "0001";  -- '1'
        when "0010010" => CharHex <= "0010";  -- '2'
        when "0000110" => CharHex <= "0011";  -- '3'
        when "1001100" => CharHex <= "0100";  -- '4' 
        when "0100100" => CharHex <= "0101";  -- '5'
        when "0100000" => CharHex <= "0110";  -- '6'
        when "0001111" => CharHex <= "0111";  -- '7'
        when "0000000" => CharHex <= "1000";  -- '8'
        when "0000100" => CharHex <= "1001";  -- '9'
        when "0001000" => CharHex <= "1010";  -- 'A'
        when "1100000" => CharHex <= "1011";  -- 'b'
        when "0110001" => CharHex <= "1100";  -- 'C'
        when "1000010" => CharHex <= "1101";  -- 'd'
        when "0110000" => CharHex <= "1110";  -- 'E'
        when "0111000" => CharHex <= "1111";  -- 'F'
        when others =>  "----";
    end case;
end process;

A tool will provide optimized logic equations and you can choose whether you want to use SSI/MSI or a PLD. 

Rick C.

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#518921

On 2018/10/10 3:43 PM, gnuarm.deletethisbit@gmail.com wrote:
> On Tuesday, October 9, 2018 at 3:21:01 AM UTC-4, John Robertson wrote:
>> On 2018/10/08 9:40 PM, Jeff Liebermann wrote:
>>> On Mon, 8 Oct 2018 21:19:16 -0700, John Robertson <spam@flippers.com>
>>> wrote:
>>>
>>>
>>>> Truth table can't display it here, so I put it here:
>>>> ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth-table.png
>>>
>>> 550 no such directory.
>>>
>>
>> Crap, this is correct:
>>
>> https://flippers.com/images/temp/7-segment-to-BCD-truth-table.png
> 
> Trouble is this truth table doesn't show the don't care states of which there are 112 of them.  This will let you highly optimize the equations you want to implement and might well let you use some pretty simple SSI/MSI logic.  Of course if you are targeting a PLD a tool can do this for you.  But then this table is not as useful as a simple case statement.
> 
> Many HDL compilers will implement don't cares by assignments of the value '-'.  Assuming the lit segments are logic lows, the important code becomes...
> 
> signal CharSegs unsigned(6 downto 0);
> signal CharHex unsigned(3 downto 0);
> 
> process (CharSegs)
> BEGIN
>      case CharSegs is
>          when "0000001" => CharHex <= "0000";  -- '0'
>          when "1001111" => CharHex <= "0001";  -- '1'
>          when "0010010" => CharHex <= "0010";  -- '2'
>          when "0000110" => CharHex <= "0011";  -- '3'
>          when "1001100" => CharHex <= "0100";  -- '4'
>          when "0100100" => CharHex <= "0101";  -- '5'
>          when "0100000" => CharHex <= "0110";  -- '6'
>          when "0001111" => CharHex <= "0111";  -- '7'
>          when "0000000" => CharHex <= "1000";  -- '8'
>          when "0000100" => CharHex <= "1001";  -- '9'
>          when "0001000" => CharHex <= "1010";  -- 'A'
>          when "1100000" => CharHex <= "1011";  -- 'b'
>          when "0110001" => CharHex <= "1100";  -- 'C'
>          when "1000010" => CharHex <= "1101";  -- 'd'
>          when "0110000" => CharHex <= "1110";  -- 'E'
>          when "0111000" => CharHex <= "1111";  -- 'F'
>          when others =>  "----";
>      end case;
> end process;
> 
> A tool will provide optimized logic equations and you can choose whether you want to use SSI/MSI or a PLD.
> 
> Rick C.
> 

Hi Rick,

I am going with a EEPROM, and the don't care states are defined as blank 
(no segments lit) so not an issue. The ST39SF010A EEPROM will be under 
$1USD, and is easy to program.

Thanks,

John :-#)#

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(Please post followups or tech inquiries to the USENET newsgroup)
                      John's Jukes Ltd.
MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3
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        "Old pinballers never die, they just flip out."

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#518790

On Tuesday, October 9, 2018 at 12:19:26 AM UTC-4, John Robertson wrote:
> On 2018/10/08 8:27 PM, gnuarm.deletethisbit@gmail.com wrote:
> > On Monday, October 8, 2018 at 9:57:49 PM UTC-4, Jeff Liebermann wrote:
> >> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
> >> wrote:
> >>
> >>> I am looking for a way to take the TTL level outputs (treating them as
> >>> inputs) of a 7448 and convert them back to the original BCD TTL input
> >>> levels (but as outputs) and I figured a simple socketed GAL would do the
> >>> trick for the least cost. However I don't have the skill set to build
> >>> the GAL logic table for this. Any suggestions? And no, I can't simply
> >>> remove the 7448 from the circuit.
> >>>
> >>> Go easy on me here, I can unscrew hardware, but Boolean has never been
> >>> my forte...
> >>
> >> Ok, a 7 segment display to BCD converter.
> >> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
> >> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
> >> be sufficient to produce a PLA or SSI implementation.
> >>
> >> So, do I get a finders fee?
> > 
> > This logic diagram is not optimal.  I guess a Karnaugh map for 7 inputs is not so easy to draw.  I was thinking about this recently.  When I was in school they taught Karnaugh maps because you would use them from time to time.  Later they taught Karnaugh maps because you needed to know how they worked so you could potentially write your own minimization programs I suppose.  I expect they barely teach Karnaugh maps because there is tons of software around to do this for you much as they don't emphasize simple arithmetic when you will likely use a calculator.
> > 
> > I think this is a lot simpler to construct from SSI than the diagram shown.  Or maybe a very few MSI devices could be used.  Or mux logic (which I was taught in school) could be used much as is done in FPGAs.  I haven't checked, but I bet this could be done with maybe six devices.
> > 
> > Rick C.
> > 
> 
> My thought was to trick a GAL into being essentially a ROM lookup table. 
> should be enough gates inside for that.
> 
> Using the link Jeff provided I have adapted the boolean equations that I 
> am hoping can be further simplified, (f' = NOT-f), but I am done for now:
> 
> W = abcdfg + bcdef’g + a’b’cdefg + a’b’c’def’g’ + abc’defg + ab’c’d’efg

W = (b'+d'+f'+g')'

This is an example of how much simpler the optimized equations can be.  To do this using tools, you would need to complete the full 128 state table with don't cares which could be done with a simple program.  Then a tool could be used to find the optimized equations. 

I did this by inspection of the short table finding the inputs required to distinguish the output values.  I don't think minimizing the equations using Boolean logic would be enough. 

I don't have the full 16 character table so this may not be the actual answer you need. 


> X = ab’cdfg+ a’bcd’e’fg+ abcd’e’f’g’ + a’b’c’def’g’ + a’bcdef’g + 
> abc’defg + ab’c’d’efg
> 
> Y = abc’deg + abcdf’g + ab’cdefg + abcd’e’f’g’ + abcdef’g + a’b’cdefg + 
> ab’c’d’efg
> 
> Z = bcd’e’f’g’+ abcde’g+ ab’cde’fg + a’b’cdefg + a’bcdef’g + ab’c’d’efg
> 
> Truth table can't display it here, so I put it here:
> 
> ftp://flippers.com//usr/www/users/flip/images/temp/7-segment-to-BCD-truth-table.png
> 
> John :-#)#

Rick C.

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#518805

On 2018/10/08 10:11 PM, gnuarm.deletethisbit@gmail.com wrote:
> On Tuesday, October 9, 2018 at 12:19:26 AM UTC-4, John Robertson wrote:
>> On 2018/10/08 8:27 PM, gnuarm.deletethisbit@gmail.com wrote:
>>> On Monday, October 8, 2018 at 9:57:49 PM UTC-4, Jeff Liebermann wrote:
>>>> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
>>>> wrote:
>>>>
>>>>> I am looking for a way to take the TTL level outputs (treating them as
>>>>> inputs) of a 7448 and convert them back to the original BCD TTL input
>>>>> levels (but as outputs) and I figured a simple socketed GAL would do the
>>>>> trick for the least cost. However I don't have the skill set to build
>>>>> the GAL logic table for this. Any suggestions? And no, I can't simply
>>>>> remove the 7448 from the circuit.
>>>>>
>>>>> Go easy on me here, I can unscrew hardware, but Boolean has never been
>>>>> my forte...
>>>>
>>>> Ok, a 7 segment display to BCD converter.
>>>> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
>>>> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
>>>> be sufficient to produce a PLA or SSI implementation.
>>>>
>>>> So, do I get a finders fee?
>>>
>>> This logic diagram is not optimal.  I guess a Karnaugh map for 7 inputs is not so easy to draw.  I was thinking about this recently.  When I was in school they taught Karnaugh maps because you would use them from time to time.  Later they taught Karnaugh maps because you needed to know how they worked so you could potentially write your own minimization programs I suppose.  I expect they barely teach Karnaugh maps because there is tons of software around to do this for you much as they don't emphasize simple arithmetic when you will likely use a calculator.
>>>
>>> I think this is a lot simpler to construct from SSI than the diagram shown.  Or maybe a very few MSI devices could be used.  Or mux logic (which I was taught in school) could be used much as is done in FPGAs.  I haven't checked, but I bet this could be done with maybe six devices.
>>>
>>> Rick C.
>>>
>>
>> My thought was to trick a GAL into being essentially a ROM lookup table.
>> should be enough gates inside for that.
>>
>> Using the link Jeff provided I have adapted the boolean equations that I
>> am hoping can be further simplified, (f' = NOT-f), but I am done for now:
>>
>> W = abcdfg + bcdef’g + a’b’cdefg + a’b’c’def’g’ + abc’defg + ab’c’d’efg
> 
> W = (b'+d'+f'+g')'
> 
> This is an example of how much simpler the optimized equations can be.  To do this using tools, you would need to complete the full 128 state table with don't cares which could be done with a simple program.  Then a tool could be used to find the optimized equations.
> 
> I did this by inspection of the short table finding the inputs required to distinguish the output values.  I don't think minimizing the equations using Boolean logic would be enough.
> 
> I don't have the full 16 character table so this may not be the actual answer you need.
> 
> 
>> X = ab’cdfg+ a’bcd’e’fg+ abcd’e’f’g’ + a’b’c’def’g’ + a’bcdef’g +
>> abc’defg + ab’c’d’efg
>>
>> Y = abc’deg + abcdf’g + ab’cdefg + abcd’e’f’g’ + abcdef’g + a’b’cdefg +
>> ab’c’d’efg
>>
>> Z = bcd’e’f’g’+ abcde’g+ ab’cde’fg + a’b’cdefg + a’bcdef’g + ab’c’d’efg
>>
>> Truth table can't display it here, so I put it here:
>>
>> https://flippers.com/images/temp/7-segment-to-BCD-truth-table.png (fixed)
>>
>> John :-#)#
> 
> Rick C.
> 

Interesting, and the corrected link is:

https://flippers.com/images/temp/7-segment-to-BCD-truth-table.png

Thanks for taking the time!

John :-#)#

-- 
(Please post followups or tech inquiries to the USENET newsgroup)
                      John's Jukes Ltd.
MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3
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        "Old pinballers never die, they just flip out."

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#518832

Jeff Liebermann <jeffl@cruzio.com> wrote:
> On Mon, 8 Oct 2018 17:20:35 -0700, John Robertson <spam@flippers.com>
> wrote:
>
>>I am looking for a way to take the TTL level outputs (treating them as 
>>inputs) of a 7448 and convert them back to the original BCD TTL input 
>>levels (but as outputs) and I figured a simple socketed GAL would do the 
>>trick for the least cost. However I don't have the skill set to build 
>>the GAL logic table for this. Any suggestions? And no, I can't simply 
>>remove the 7448 from the circuit.
>>
>>Go easy on me here, I can unscrew hardware, but Boolean has never been 
>>my forte...
>
> Ok, a 7 segment display to BCD converter.
> <http://slidegur.com/doc/1081821/7-segment-to-bcd-converter>
> The truth table on Pg 5, logic on Pg 6, and schematic on Pg 8 should
> be sufficient to produce a PLA or SSI implementation.  

Funny that they did not notice you don't need all segments to decode
the displayed digit, assuming only valid decimal numbers are displayed.

E.g. the "c" segment is on for all digits except "2", and it can be
omitted entirely from the decode as the "2" can still be recognized.

Similar, the "d" does not have to be included in the decode and still
all valid digits can be decoded.

This leaves 5 logic bits to be tested instead of 7, reducing the logic.

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#518783

"John Robertson" <spam@flippers.com> wrote in message 
news:FpWdnYuq0ujJaSbGnZ2dnUU7-I_NnZ2d@giganews.com...
>I am looking for a way to take the TTL level outputs (treating them as 
>inputs) of a 7448 and convert them back to the original BCD TTL input 
>levels (but as outputs) and I figured a simple socketed GAL would do the 
>trick for the least cost. However I don't have the skill set to build the 
>GAL logic table for this. Any suggestions? And no, I can't simply remove 
>the 7448 from the circuit.
>
> Go easy on me here, I can unscrew hardware, but Boolean has never been my 
> forte...
>
> Thanks!
>
> John :-#)#
> -- 

One way to do it is to use an EPROM.  Connect the seven segments to AD0 to 
AD6. Use the first four data outputs (D0 to D3) for the BCD code. Make up a 
table with the correct memory locations to put 1s in for the decoder. Tie 
/CE and /CS to the appropriate levels. A 2716 would work fine, just ignore 
the unwanted outputs and tie AD7 to ground.


Regards 

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#518804

On 2018/10/08 9:15 PM, tom wrote:
> 
> "John Robertson" <spam@flippers.com> wrote in message
> news:FpWdnYuq0ujJaSbGnZ2dnUU7-I_NnZ2d@giganews.com...
>> I am looking for a way to take the TTL level outputs (treating them as
>> inputs) of a 7448 and convert them back to the original BCD TTL input
>> levels (but as outputs) and I figured a simple socketed GAL would do the
>> trick for the least cost. However I don't have the skill set to build the
>> GAL logic table for this. Any suggestions? And no, I can't simply remove
>> the 7448 from the circuit.
>>
>> Go easy on me here, I can unscrew hardware, but Boolean has never been my
>> forte...
>>
>> Thanks!
>>
>> John :-#)#
>> -- 
> 
> One way to do it is to use an EPROM.  Connect the seven segments to AD0 to
> AD6. Use the first four data outputs (D0 to D3) for the BCD code. Make up a
> table with the correct memory locations to put 1s in for the decoder. Tie
> /CE and /CS to the appropriate levels. A 2716 would work fine, just ignore
> the unwanted outputs and tie AD7 to ground.
> 
> 
> Regards
> 
> 

Was looking for tiny, I have lots of Eproms, but space, eh? An Eprom 
would be simple too. The look up table would only take 15 bytes, you 
would use the Address lines A0-A3 with the Data lines being the outputs. 
Easy, but too big for my application. I guess I could use a tiny EPROM, 
should have looked for that I guess. Got caught up in elegant solutions...

John :-#)#

-- 
(Please post followups or tech inquiries to the USENET newsgroup)
                      John's Jukes Ltd.
MOVED to #7 - 3979 Marine Way, Burnaby, BC, Canada V5J 5E3
          (604)872-5757 (Pinballs, Jukes, Video Games)
                      www.flippers.com
        "Old pinballers never die, they just flip out."

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#518813

Am 09.10.2018 um 09:26 schrieb John Robertson:
> On 2018/10/08 9:15 PM, tom wrote:

>> One way to do it is to use an EPROM.  Connect the seven segments to 
>> AD0 to
>> AD6. Use the first four data outputs (D0 to D3) for the BCD code. Make 
>> up a
>> table with the correct memory locations to put 1s in for the decoder. Tie
>> /CE and /CS to the appropriate levels. A 2716 would work fine, just 
>> ignore
>> the unwanted outputs and tie AD7 to ground.
>>
>>
>> Regards
>>
>>
> 
> Was looking for tiny, I have lots of Eproms, but space, eh? An Eprom 
> would be simple too. The look up table would only take 15 bytes, you 
> would use the Address lines A0-A3 with the Data lines being the outputs. 
> Easy, but too big for my application. I guess I could use a tiny EPROM, 
> should have looked for that I guess. Got caught up in elegant solutions...

Someone I knew got bitten by that. He had an EPROM that contained
dynamic logic. It would present the correct data, but after some
time the data turned wrong. Hold time was not eternal.

Perfectly OK for a processor, but not for character mapping of a
mechanical teletype.

:-) Gerhard

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#518819

On Tuesday, 9 October 2018 13:23:50 UTC+1, Gerhard Hoffmann  wrote:
> Am 09.10.2018 um 09:26 schrieb John Robertson:
> > On 2018/10/08 9:15 PM, tom wrote:
> 
> >> One way to do it is to use an EPROM.  Connect the seven segments to 
> >> AD0 to
> >> AD6. Use the first four data outputs (D0 to D3) for the BCD code. Make 
> >> up a
> >> table with the correct memory locations to put 1s in for the decoder. Tie
> >> /CE and /CS to the appropriate levels. A 2716 would work fine, just 
> >> ignore
> >> the unwanted outputs and tie AD7 to ground.
> >>
> >>
> >> Regards
> >>
> >>
> > 
> > Was looking for tiny, I have lots of Eproms, but space, eh? An Eprom 
> > would be simple too. The look up table would only take 15 bytes, you 
> > would use the Address lines A0-A3 with the Data lines being the outputs. 
> > Easy, but too big for my application. I guess I could use a tiny EPROM, 
> > should have looked for that I guess. Got caught up in elegant solutions...
> 
> Someone I knew got bitten by that. He had an EPROM that contained
> dynamic logic. It would present the correct data, but after some
> time the data turned wrong. Hold time was not eternal.
> 
> Perfectly OK for a processor, but not for character mapping of a
> mechanical teletype.
> 
> :-) Gerhard

EPROMs can be nice for this sort of thing, but there are likely to be
some glitches before the outputs settle to the values you are
expecting.  This may or may not matter, depending on what comes next
in your system. If one of the outputs is being used to generate a clock
for a peripheral it really matters!

As mentioned above, a small processor will probably give you the
smallest solution.

John


John
 

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