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Groups > sci.electronics.design > #460255 > unrolled thread
| Started by | bitrex <bitrex@de.lete.earthlink.net> |
|---|---|
| First post | 2017-05-14 13:50 -0400 |
| Last post | 2017-05-16 14:05 +0000 |
| Articles | 14 on this page of 134 — 16 participants |
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Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 13:50 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 11:27 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-14 19:19 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 15:24 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 12:54 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:02 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 13:10 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:16 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:18 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 14:14 -0700
Re: Fast buffer idea "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> - 2017-05-15 19:51 +0100
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 13:17 -0700
Re: Fast buffer idea Clifford Heath <clifford.heath@gmail.com> - 2017-05-17 09:14 +1000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-16 16:26 -0700
Re: Fast buffer idea "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-05-17 02:04 -0500
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-14 20:26 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:31 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:43 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 14:17 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-14 21:53 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 16:14 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 19:59 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 20:06 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 00:16 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 20:10 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 03:28 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 20:48 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 04:17 +0000
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 07:56 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 06:58 -0400
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 12:59 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-15 07:01 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 10:09 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 10:18 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-15 08:56 -0700
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 16:02 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 10:33 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 18:15 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 14:25 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 14:26 -0400
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 16:24 +0000
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 16:36 +0000
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 17:18 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 13:30 -0400
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 18:07 +0000
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 19:19 +0000
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 19:45 +0000
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-16 08:33 +0000
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 19:13 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 15:33 -0400
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-16 08:16 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-16 22:10 -0400
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 19:10 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-15 08:55 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 12:51 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 12:56 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 13:05 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 10:28 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 13:38 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 11:29 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 18:41 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 13:19 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 20:46 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 13:56 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 21:00 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 16:46 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-16 01:22 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-16 11:16 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-16 18:55 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-16 12:21 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-16 20:33 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-16 14:00 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-16 21:21 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-16 16:15 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-16 23:58 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-16 17:51 -0700
Re: Fast buffer idea pcdhobbs@gmail.com - 2017-05-16 16:30 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-17 00:16 +0000
Re: Fast buffer idea pcdhobbs@gmail.com - 2017-05-16 18:05 -0700
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-16 20:05 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-25 01:13 +0000
Re: Fast buffer idea Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> - 2017-05-24 21:43 -0400
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-30 03:16 +0000
Re: Fast buffer idea Ralph Barone <ralph@invalid.com> - 2017-05-17 02:26 +0000
Re: Fast buffer idea Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2017-05-17 08:34 +0200
Re: Fast buffer idea Ralph Barone <ralph@invalid.com> - 2017-05-17 14:31 +0000
Re: Fast buffer idea Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> - 2017-05-17 10:39 -0400
Re: Fast buffer idea Reinhardt Behm <rbehm@hushmail.com> - 2017-05-17 23:02 +0800
Re: Fast buffer idea Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2017-05-16 21:24 +0200
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-16 20:12 -0700
Re: Fast buffer idea Winfield Hill <hill@rowland.harvard.edu> - 2017-05-25 04:38 -0700
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-25 07:28 -0700
Re: Fast buffer idea "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-05-26 08:54 -0500
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-26 14:14 +0000
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-26 07:21 -0700
Re: Fast buffer idea "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> - 2017-05-16 20:27 +0100
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 15:05 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 15:19 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highland_snip_technology.com> - 2017-05-15 13:21 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 20:56 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 17:37 -0400
Re: Fast buffer idea "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> - 2017-05-15 19:50 +0100
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 19:25 +0000
Re: Fast buffer idea "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> - 2017-05-16 20:19 +0100
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 14:33 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 13:15 -0400
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-15 19:05 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-15 15:38 -0400
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-16 08:12 +0000
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-16 18:47 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-16 21:52 -0400
Re: Fast buffer idea Winfield Hill <hill@rowland.harvard.edu> - 2017-05-25 05:05 -0700
Re: Fast buffer idea pcdhobbs@gmail.com - 2017-05-25 05:42 -0700
Re: Fast buffer idea Winfield Hill <hill@rowland.harvard.edu> - 2017-05-25 05:49 -0700
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-25 08:10 -0700
Re: Fast buffer idea Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2017-05-25 15:01 +0200
Re: Fast buffer idea "John Miles, KE5FX" <jmiles@gmail.com> - 2017-05-14 18:53 -0700
Re: Fast buffer idea Steve Wilson <no@spam.com> - 2017-05-15 02:45 +0000
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 15:23 -0400
Re: Fast buffer idea "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> - 2017-05-14 20:28 +0100
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:00 -0400
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 16:10 -0400
Re: Fast buffer idea Winfield Hill <hill@rowland.harvard.edu> - 2017-05-14 17:58 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-14 23:13 -0400
Re: Fast buffer idea Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2017-05-16 17:27 -0700
Re: Fast buffer idea Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2017-05-16 17:34 -0700
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-14 20:14 -0700
Re: Fast buffer idea "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> - 2017-05-15 19:42 +0100
Re: Fast buffer idea "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-05-16 03:29 -0500
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-16 06:57 -0700
Re: Fast buffer idea bitrex <bitrex@de.lete.earthlink.net> - 2017-05-16 22:47 -0400
Re: Fast buffer idea John Larkin <jjlarkin@highlandtechnology.com> - 2017-05-16 20:18 -0700
Re: Fast buffer idea "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-05-17 02:22 -0500
Re: Fast buffer idea Jan Panteltje <pNa0nStpealmtje@yahoo.com> - 2017-05-16 14:05 +0000
Page 7 of 7 — ← Prev page 1 2 3 4 5 6 [7]
| From | bitrex <bitrex@de.lete.earthlink.net> |
|---|---|
| Date | 2017-05-14 16:00 -0400 |
| Message-ID | <AH2SA.117719$ef.53341@fx34.iad> |
| In reply to | #460266 |
On 05/14/2017 03:28 PM, Kevin Aylward wrote: > "bitrex" wrote in message news:vN0SA.45616$3M3.37466@fx16.iad... > >> Diamond buffers are kind of cool, emitter feedback makes them linear >> and they don't have much phase shift, but they kind of suck balls >> whenever you want to actually move appreciable current with them which >> unfortunately is exactly what you'd want to do with a buffer. > >> I came up with this thing that uses a sort of MOSFET-BJT Sziklai pair >> input-thing to drive boosting transistors to pump more dynamic current >> into the output follower's bases to speed up the transitions. This is >> the sim of it pushing a 100MHz square wave into a load using jellybean >> transistors: > > What are the design goals? If you want speed and low distortion, you > should drop the mosfets, and the jelly bean transistors. Use the highest > ft bipolara that you can find, like 10Ghz. The low gm of the mosfets > really kill things. Sort of a poor-mans OPA663, to drive high-frequency pulses down a several meter length of RG-58 coax. Any suggestions for transistors? With Spice models? I figured it would make sense to see if the topology is at all valid with slower transistors first, because those fast parts are much more difficult to work with. > On the spice side, the setting looked f'uped. Why are you running so > many cycles, so that the edge rates are ~10ns in a 200us plot! You > should only have to run for 50ns. There are probably some initial conditions I need to set. > Also, the schematic has s/c diodes. > > I haven't run it yet, as it wont due to errors in the file you pasted. Ok, I'll fix it up and see if it can be optimized.
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| From | bitrex <bitrex@de.lete.earthlink.net> |
|---|---|
| Date | 2017-05-14 16:10 -0400 |
| Message-ID | <xQ2SA.188676$kI.30548@fx43.iad> |
| In reply to | #460266 |
On 05/14/2017 03:28 PM, Kevin Aylward wrote: > I haven't examined the effectiveness of the additional boost circuit, > but it is important to make sure the basic design is optimised first. > Typically, something like a 1:4 build up in current from the first bip > follower to the second bip follower. In an asic design I might use the > same current and use multiple devices in parallel. I would suggest > trying an active current source to the input followers, to get the drive > to the second follower, and remove the boost circuit. Use standard > configurations, until you can prove that a bright idea is truly better. The problem with a simple active current source to the input followers is quiescent current draw - if you optimize the follower current source for the gain you need at the highest frequency the buffer draws a huge helping of quiescent current sitting around doing nothing. IC implementations solve this in various clever ways using - you guessed it - _more_ active current sources.
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| From | Winfield Hill <hill@rowland.harvard.edu> |
|---|---|
| Date | 2017-05-14 17:58 -0700 |
| Message-ID | <ofauge01mfu@drn.newsguy.com> |
| In reply to | #460271 |
bitrex wrote...
>
> On 05/14/2017 03:28 PM, Kevin Aylward wrote:
>
>> I haven't examined the effectiveness of the additional boost circuit,
>> but it is important to make sure the basic design is optimised first.
>> Typically, something like a 1:4 build up in current from the first bip
>> follower to the second bip follower. In an asic design I might use the
>> same current and use multiple devices in parallel. I would suggest
>> trying an active current source to the input followers, to get the drive
>> to the second follower, and remove the boost circuit. Use standard
>> configurations, until you can prove that a bright idea is truly better.
>
> The problem with a simple active current source to the input followers
> is quiescent current draw - if you optimize the follower current source
> for the gain you need at the highest frequency the buffer draws a huge
> helping of quiescent current sitting around doing nothing.
Devices that are off, or mostly off, are slow to turn on.
You suffer from a t = C V / i delay time. SPICE fails
to give you the proper value for C, and the delay for i.
This is especially true if you invoke any MOSFET models.
You can make SPICE devices do all kinds of amazing things.
This is NOT to say the real device can do the same thing.
--
Thanks,
- Win
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| From | bitrex <bitrex@de.lete.earthlink.net> |
|---|---|
| Date | 2017-05-14 23:13 -0400 |
| Message-ID | <R19SA.188710$kI.183435@fx43.iad> |
| In reply to | #460301 |
On 05/14/2017 08:58 PM, Winfield Hill wrote: > bitrex wrote... >> >> On 05/14/2017 03:28 PM, Kevin Aylward wrote: >> >>> I haven't examined the effectiveness of the additional boost circuit, >>> but it is important to make sure the basic design is optimised first. >>> Typically, something like a 1:4 build up in current from the first bip >>> follower to the second bip follower. In an asic design I might use the >>> same current and use multiple devices in parallel. I would suggest >>> trying an active current source to the input followers, to get the drive >>> to the second follower, and remove the boost circuit. Use standard >>> configurations, until you can prove that a bright idea is truly better. >> >> The problem with a simple active current source to the input followers >> is quiescent current draw - if you optimize the follower current source >> for the gain you need at the highest frequency the buffer draws a huge >> helping of quiescent current sitting around doing nothing. > > Devices that are off, or mostly off, are slow to turn on. > You suffer from a t = C V / i delay time. SPICE fails > to give you the proper value for C, and the delay for i. > This is especially true if you invoke any MOSFET models. The Spice models for discrete transistors are so rough that they don't even model the device capacitances and charge storage effects correctly?
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| From | Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> |
|---|---|
| Date | 2017-05-16 17:27 -0700 |
| Message-ID | <u36nhcdov5h795dar2qgjtv7maqd26uhpc@4ax.com> |
| In reply to | #460301 |
On 14 May 2017 17:58:54 -0700, Winfield Hill
<hill@rowland.harvard.edu> wrote:
>bitrex wrote...
>>
>> On 05/14/2017 03:28 PM, Kevin Aylward wrote:
>>
>>> I haven't examined the effectiveness of the additional boost circuit,
>>> but it is important to make sure the basic design is optimised first.
>>> Typically, something like a 1:4 build up in current from the first bip
>>> follower to the second bip follower. In an asic design I might use the
>>> same current and use multiple devices in parallel. I would suggest
>>> trying an active current source to the input followers, to get the drive
>>> to the second follower, and remove the boost circuit. Use standard
>>> configurations, until you can prove that a bright idea is truly better.
>>
>> The problem with a simple active current source to the input followers
>> is quiescent current draw - if you optimize the follower current source
>> for the gain you need at the highest frequency the buffer draws a huge
>> helping of quiescent current sitting around doing nothing.
>
> Devices that are off, or mostly off, are slow to turn on.
> You suffer from a t = C V / i delay time. SPICE fails
> to give you the proper value for C, and the delay for i.
> This is especially true if you invoke any MOSFET models.
>
> You can make SPICE devices do all kinds of amazing things.
> This is NOT to say the real device can do the same thing.
SPICE doesn't "fail", the crappy model failed.
"This is especially true if you invoke any [discrete] MOSFET models."
Chip foundry models are superb, and have never failed me.
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Thinking outside the box... producing elegant solutions.
"It is not in doing what you like, but in liking what you do that
is the secret of happiness." -James Barrie
[toc] | [prev] | [next] | [standalone]
| From | Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> |
|---|---|
| Date | 2017-05-16 17:34 -0700 |
| Message-ID | <ug6nhctal2hnqud9n9qejhf0rrqhuhkvq0@4ax.com> |
| In reply to | #460610 |
On Tue, 16 May 2017 17:27:24 -0700, Jim Thompson
<To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> wrote:
>On 14 May 2017 17:58:54 -0700, Winfield Hill
><hill@rowland.harvard.edu> wrote:
>
>>bitrex wrote...
>>>
>>> On 05/14/2017 03:28 PM, Kevin Aylward wrote:
>>>
>>>> I haven't examined the effectiveness of the additional boost circuit,
>>>> but it is important to make sure the basic design is optimised first.
>>>> Typically, something like a 1:4 build up in current from the first bip
>>>> follower to the second bip follower. In an asic design I might use the
>>>> same current and use multiple devices in parallel. I would suggest
>>>> trying an active current source to the input followers, to get the drive
>>>> to the second follower, and remove the boost circuit. Use standard
>>>> configurations, until you can prove that a bright idea is truly better.
>>>
>>> The problem with a simple active current source to the input followers
>>> is quiescent current draw - if you optimize the follower current source
>>> for the gain you need at the highest frequency the buffer draws a huge
>>> helping of quiescent current sitting around doing nothing.
>>
>> Devices that are off, or mostly off, are slow to turn on.
>> You suffer from a t = C V / i delay time. SPICE fails
>> to give you the proper value for C, and the delay for i.
>> This is especially true if you invoke any MOSFET models.
>>
>> You can make SPICE devices do all kinds of amazing things.
>> This is NOT to say the real device can do the same thing.
>
>SPICE doesn't "fail", the crappy model failed.
Emendment: LTspice may lie to you and show an unrealistic speed...
unless you understand Spice and set the control parameters properly,
AND select Solver=Alternate.
>
>"This is especially true if you invoke any [discrete] MOSFET models."
>
>Chip foundry models are superb, and have never failed me.
>
> ...Jim Thompson
...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| STV, Queen Creek, AZ 85142 Skype: skypeanalog | |
| Voice:(480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |
Thinking outside the box... producing elegant solutions.
"It is not in doing what you like, but in liking what you do that
is the secret of happiness." -James Barrie
[toc] | [prev] | [next] | [standalone]
| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-05-14 20:14 -0700 |
| Message-ID | <937ihcpose7eq6ulu94vium3snbbaqf251@4ax.com> |
| In reply to | #460271 |
On Sun, 14 May 2017 16:10:04 -0400, bitrex <bitrex@de.lete.earthlink.net> wrote: >On 05/14/2017 03:28 PM, Kevin Aylward wrote: > >> I haven't examined the effectiveness of the additional boost circuit, >> but it is important to make sure the basic design is optimised first. >> Typically, something like a 1:4 build up in current from the first bip >> follower to the second bip follower. In an asic design I might use the >> same current and use multiple devices in parallel. I would suggest >> trying an active current source to the input followers, to get the drive >> to the second follower, and remove the boost circuit. Use standard >> configurations, until you can prove that a bright idea is truly better. > >The problem with a simple active current source to the input followers >is quiescent current draw - if you optimize the follower current source >for the gain you need at the highest frequency the buffer draws a huge >helping of quiescent current sitting around doing nothing. > >IC implementations solve this in various clever ways using - you guessed >it - _more_ active current sources. Analog ICs can use basically unlimited numbers of radical parts, and have essentially no interconnect parasitics. And they can spend a lot of money on design. -- John Larkin Highland Technology, Inc lunatic fringe electronics
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| From | "Kevin Aylward" <kevinRemovAT@kevinaylward.co.uk> |
|---|---|
| Date | 2017-05-15 19:42 +0100 |
| Message-ID | <jPKdnUMnf80Wa4TEnZ2dnUU7-SPNnZ2d@giganews.com> |
| In reply to | #460314 |
>"John Larkin" wrote in message >news:937ihcpose7eq6ulu94vium3snbbaqf251@4ax.com... >>The problem with a simple active current source to the input followers >>is quiescent current draw - if you optimize the follower current source >>for the gain you need at the highest frequency the buffer draws a huge >>helping of quiescent current sitting around doing nothing. > >>IC implementations solve this in various clever ways using - you guessed >>it - _more_ active current sources. >Analog ICs can use basically unlimited numbers of radical parts, and >have essentially no interconnect parasitics. And they can spend a lot >of money on design. Indeed.... I remember Jim T boasting..err... I mean informing us all, maybe 15 years ago, that he just paid a tax bill of $500,000 -- Kevin Aylward http://www.anasoft.co.uk - SuperSpice http://www.kevinaylward.co.uk/ee/index.html
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| From | "Tim Williams" <tiwill@seventransistorlabs.com> |
|---|---|
| Date | 2017-05-16 03:29 -0500 |
| Message-ID | <ofed2o$7nr$1@dont-email.me> |
| In reply to | #460255 |
This was fun. Not bad for 3904s. https://www.seventransistorlabs.com/Images/High_Speed_Buffer.png See how it works with 10GHz transistors. :^) Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com "bitrex" <bitrex@de.lete.earthlink.net> wrote in message news:vN0SA.45616$3M3.37466@fx16.iad... > Diamond buffers are kind of cool, emitter feedback makes them linear and > they don't have much phase shift, but they kind of suck balls whenever you > want to actually move appreciable current with them which unfortunately is > exactly what you'd want to do with a buffer. > > I came up with this thing that uses a sort of MOSFET-BJT Sziklai pair > input-thing to drive boosting transistors to pump more dynamic current > into the output follower's bases to speed up the transitions. This is the > sim of it pushing a 100MHz square wave into a load using jellybean > transistors: > > http://imgur.com/a/bM8hl > > Fast recovery didoes from the bases of the boosting transistors to ground > and Vcc seem to speed up the transitions a lot. > > Version 4 > SHEET 1 1804 1564 > WIRE -16 -592 -16 -672 > WIRE 160 -592 -16 -592 > WIRE 320 -592 160 -592 > WIRE 480 -592 320 -592 > WIRE 624 -592 480 -592 > WIRE 896 -592 624 -592 > WIRE -16 -480 -16 -592 > WIRE 320 -480 320 -592 > WIRE 160 -464 160 -592 > WIRE 480 -464 480 -592 > WIRE 624 -352 624 -592 > WIRE -16 -320 -16 -400 > WIRE 160 -320 160 -400 > WIRE 160 -320 -16 -320 > WIRE 320 -304 320 -400 > WIRE 480 -304 480 -400 > WIRE 480 -304 320 -304 > WIRE 560 -304 480 -304 > WIRE -16 -256 -16 -320 > WIRE 896 -160 896 -592 > WIRE -576 -112 -576 -144 > WIRE -16 -112 -16 -176 > WIRE 624 -112 624 -256 > WIRE 624 -112 -16 -112 > WIRE 704 -112 624 -112 > WIRE 832 -112 768 -112 > WIRE -16 -32 -16 -112 > WIRE -576 -16 -576 -32 > WIRE -576 -16 -688 -16 > WIRE -64 -16 -224 -16 > WIRE -576 16 -576 -16 > WIRE 896 16 896 -64 > WIRE -688 32 -688 -16 > WIRE 320 96 320 -304 > WIRE -576 144 -576 96 > WIRE -16 144 -16 64 > WIRE 160 144 -16 144 > WIRE 256 144 160 144 > WIRE 896 176 896 16 > WIRE 544 192 320 192 > WIRE 160 208 160 144 > WIRE -16 336 -16 144 > WIRE 160 336 160 272 > WIRE 160 336 -16 336 > WIRE 320 336 160 336 > WIRE 544 384 544 192 > WIRE 896 384 896 256 > WIRE 896 384 544 384 > WIRE 992 384 896 384 > WIRE 1152 384 1072 384 > WIRE 1312 384 1232 384 > WIRE 1472 384 1392 384 > WIRE 1600 384 1472 384 > WIRE 1696 384 1600 384 > WIRE -416 400 -576 400 > WIRE -224 400 -224 -16 > WIRE -224 400 -416 400 > WIRE 160 432 -16 432 > WIRE 320 432 896 16 > WIRE 320 432 160 432 > WIRE -576 448 -576 400 > WIRE -416 448 -416 400 > WIRE 160 496 160 432 > WIRE 1472 512 1472 384 > WIRE 1600 512 1600 384 > WIRE 896 528 896 384 > WIRE 544 560 544 384 > WIRE 544 560 320 560 > WIRE -576 576 -576 528 > WIRE -416 576 -416 528 > WIRE -16 608 -16 432 > WIRE 160 608 160 560 > WIRE 160 608 -16 608 > WIRE 256 608 160 608 > WIRE 1472 704 1472 576 > WIRE 1600 704 1600 592 > WIRE -16 784 -16 608 > WIRE 896 784 320 336 > WIRE 896 784 896 608 > WIRE -224 864 -224 400 > WIRE -64 864 -224 864 > WIRE 896 912 896 784 > WIRE -16 960 -16 880 > WIRE 624 960 -16 960 > WIRE 704 960 624 960 > WIRE 832 960 768 960 > WIRE -16 1008 -16 960 > WIRE 624 1072 624 960 > WIRE 320 1120 320 656 > WIRE 480 1120 320 1120 > WIRE 560 1120 480 1120 > WIRE -16 1152 -16 1088 > WIRE 144 1152 -16 1152 > WIRE -16 1216 -16 1152 > WIRE 320 1216 320 1120 > WIRE 144 1232 144 1152 > WIRE 480 1232 480 1120 > WIRE -16 1360 -16 1296 > WIRE 144 1360 144 1296 > WIRE 144 1360 -16 1360 > WIRE 320 1360 320 1296 > WIRE 320 1360 144 1360 > WIRE 480 1360 480 1296 > WIRE 480 1360 320 1360 > WIRE 624 1360 624 1168 > WIRE 624 1360 480 1360 > WIRE 896 1360 896 1008 > WIRE 896 1360 624 1360 > WIRE -16 1472 -16 1360 > FLAG 1696 384 Out > IOPIN 1696 384 Out > FLAG -16 1472 Vee > FLAG -16 -672 Vcc > FLAG -688 32 0 > FLAG -576 -144 Vcc > FLAG -576 144 Vee > FLAG -416 576 0 > FLAG -576 576 0 > FLAG 1472 704 0 > FLAG 1600 704 0 > SYMBOL npn 832 -160 R0 > WINDOW 3 67 65 Left 2 > SYMATTR Value 2SCR514P > SYMATTR InstName Q1 > SYMBOL pnp 832 1008 M180 > SYMATTR InstName Q2 > SYMATTR Value 2SAR514P > SYMBOL res 880 160 R0 > SYMATTR InstName R1 > SYMATTR Value 10 > SYMBOL res 880 512 R0 > SYMATTR InstName R2 > SYMATTR Value 10 > SYMBOL nmos -64 784 R0 > SYMATTR InstName M1 > SYMATTR Value RHP030N03 > SYMBOL pmos -64 64 M180 > SYMATTR InstName M2 > SYMATTR Value RRS100P03 > SYMBOL res -32 1200 R0 > SYMATTR InstName R3 > SYMATTR Value 47k > SYMBOL res -32 -496 R0 > SYMATTR InstName R4 > SYMATTR Value 47k > SYMBOL voltage -576 -128 R0 > WINDOW 123 0 0 Left 2 > WINDOW 39 0 0 Left 2 > SYMATTR InstName V1 > SYMATTR Value 5 > SYMBOL voltage -576 0 R0 > WINDOW 123 0 0 Left 2 > WINDOW 39 0 0 Left 2 > SYMATTR InstName V2 > SYMATTR Value 5 > SYMBOL res -432 432 R0 > SYMATTR InstName R5 > SYMATTR Value 100k > SYMBOL voltage -576 432 R0 > WINDOW 3 -190 227 Left 2 > WINDOW 123 0 0 Left 2 > WINDOW 39 0 0 Left 2 > SYMATTR Value PULSE(-3 3 0 0.1n 0.1n 5n 10n) > SYMATTR InstName V3 > SYMBOL res 1088 368 R90 > WINDOW 0 0 56 VBottom 2 > WINDOW 3 32 56 VTop 2 > SYMATTR InstName R6 > SYMATTR Value 50 > SYMBOL cap 1456 512 R0 > SYMATTR InstName C1 > SYMATTR Value 100p > SYMBOL ind 1248 368 R90 > WINDOW 0 5 56 VBottom 2 > WINDOW 3 59 53 VTop 2 > SYMATTR InstName L1 > SYMATTR Value 100nH > SYMBOL res 1584 496 R0 > SYMATTR InstName R7 > SYMATTR Value 50 > SYMBOL res 1408 368 R90 > WINDOW 0 0 56 VBottom 2 > WINDOW 3 32 56 VTop 2 > SYMATTR InstName R8 > SYMATTR Value 1 > SYMBOL pnp 256 656 M180 > SYMATTR InstName Q3 > SYMATTR Value 2N3906 > SYMBOL npn 256 96 R0 > SYMATTR InstName Q4 > SYMATTR Value 2N3904 > SYMBOL res 304 -496 R0 > SYMATTR InstName R9 > SYMATTR Value 100 > SYMBOL pnp 560 -256 M180 > SYMATTR InstName Q5 > SYMATTR Value 2N3906 > SYMBOL npn 560 1072 R0 > SYMATTR InstName Q6 > SYMATTR Value 2N3904 > SYMBOL res 304 1200 R0 > SYMATTR InstName R10 > SYMATTR Value 100 > SYMBOL schottky 144 208 R0 > SYMATTR InstName D1 > SYMATTR Value BAT54 > SYMATTR Description Diode > SYMATTR Type diode > SYMBOL diode 496 -400 R180 > WINDOW 0 24 64 Left 2 > WINDOW 3 24 0 Left 2 > SYMATTR InstName D4 > SYMATTR Value RF05VA1S > SYMBOL res -32 -272 R0 > SYMATTR InstName R11 > SYMATTR Value 4.7k > SYMBOL cap 144 -464 R0 > SYMATTR InstName C2 > SYMATTR Value 5p > SYMBOL res -32 992 R0 > SYMATTR InstName R12 > SYMATTR Value 4.7k > SYMBOL cap 128 1232 R0 > SYMATTR InstName C3 > SYMATTR Value 5p > SYMBOL FerriteBead 736 960 R90 > WINDOW 0 -16 0 VBottom 2 > SYMATTR InstName L3 > SYMATTR Value 22n > SYMATTR SpiceLine Ipk=0.5 Rser=0.044 Rpar=13 Cpar=1.6p mfg="Wurth > Elektronik" pn="742 792 711 0" > SYMBOL FerriteBead 736 -112 R90 > WINDOW 0 -16 0 VBottom 2 > SYMATTR InstName L2 > SYMATTR Value 22n > SYMATTR SpiceLine Ipk=0.5 Rser=0.044 Rpar=13 Cpar=1.6p mfg="Wurth > Elektronik" pn="742 792 711 0" > SYMBOL diode 496 1296 R180 > WINDOW 0 24 64 Left 2 > WINDOW 3 24 0 Left 2 > SYMATTR InstName D3 > SYMATTR Value RF05VA1S > SYMBOL schottky 176 560 R180 > WINDOW 0 24 64 Left 2 > WINDOW 3 24 0 Left 2 > SYMATTR InstName D2 > SYMATTR Value BAT54 > SYMATTR Description Diode > SYMATTR Type diode > TEXT -688 704 Left 2 !.tran 800u
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| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-05-16 06:57 -0700 |
| Message-ID | <q91mhc1tn418vr2sumq2jm7sf8lda2na30@4ax.com> |
| In reply to | #460480 |
On Tue, 16 May 2017 03:29:30 -0500, "Tim Williams" <tiwill@seventransistorlabs.com> wrote: >This was fun. Not bad for 3904s. >https://www.seventransistorlabs.com/Images/High_Speed_Buffer.png >See how it works with 10GHz transistors. :^) > >Tim You have almost built an opamp! -- John Larkin Highland Technology, Inc lunatic fringe electronics
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| From | bitrex <bitrex@de.lete.earthlink.net> |
|---|---|
| Date | 2017-05-16 22:47 -0400 |
| Message-ID | <yROSA.117083$Sb.81907@fx37.iad> |
| In reply to | #460496 |
On 05/16/2017 09:57 AM, John Larkin wrote: > On Tue, 16 May 2017 03:29:30 -0500, "Tim Williams" > <tiwill@seventransistorlabs.com> wrote: > >> This was fun. Not bad for 3904s. >> https://www.seventransistorlabs.com/Images/High_Speed_Buffer.png >> See how it works with 10GHz transistors. :^) >> >> Tim > > You have almost built an opamp! > > It's a little different than a usual op-amp topology - at low frequencies the LTP and mirror are driving the emitter followers through Q6 and Q7, and high frequencies they're bypassed by C1 and C2 to put current directly into the output transistor bases. I think it's trading off open-loop gain at high frequencies for lower overall phase shift and higher slew rate.
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| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-05-16 20:18 -0700 |
| Message-ID | <74gnhchkpgp02085hlnrhgce6u0u9av9qc@4ax.com> |
| In reply to | #460626 |
On Tue, 16 May 2017 22:47:57 -0400, bitrex <bitrex@de.lete.earthlink.net> wrote: >On 05/16/2017 09:57 AM, John Larkin wrote: >> On Tue, 16 May 2017 03:29:30 -0500, "Tim Williams" >> <tiwill@seventransistorlabs.com> wrote: >> >>> This was fun. Not bad for 3904s. >>> https://www.seventransistorlabs.com/Images/High_Speed_Buffer.png >>> See how it works with 10GHz transistors. :^) >>> >>> Tim >> >> You have almost built an opamp! >> >> > >It's a little different than a usual op-amp topology - at low >frequencies the LTP and mirror are driving the emitter followers through >Q6 and Q7, and high frequencies they're bypassed by C1 and C2 to put >current directly into the output transistor bases. I think it's trading >off open-loop gain at high frequencies for lower overall phase shift and >higher slew rate. No, the polarities are wrong for C1 and C2 to be forward gain paths. -- John Larkin Highland Technology, Inc lunatic fringe electronics
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| From | "Tim Williams" <tiwill@seventransistorlabs.com> |
|---|---|
| Date | 2017-05-17 02:22 -0500 |
| Message-ID | <ofgtg5$ge9$1@dont-email.me> |
| In reply to | #460633 |
"John Larkin" <jjlarkin@highlandtechnology.com> wrote in message news:74gnhchkpgp02085hlnrhgce6u0u9av9qc@4ax.com... >>It's a little different than a usual op-amp topology - at low >>frequencies the LTP and mirror are driving the emitter followers through >>Q6 and Q7, and high frequencies they're bypassed by C1 and C2 to put >>current directly into the output transistor bases. I think it's trading >>off open-loop gain at high frequencies for lower overall phase shift and >>higher slew rate. > > No, the polarities are wrong for C1 and C2 to be forward gain paths. > Yeah, it wouldn't work so well without current gain from the mirrors; that's just R+C compensation, which gives about a decade past the dominant-pole compensation that is traditional, which is just dumb, really. It's compensated for unity gain stability, and yes, it is a proper op-amp block, with uncommitted inputs and crappy saturation near the rails (for inputs and outputs). :) If you need more GBW and less feedback, just crank the compensation values down. I wouldn't think it would be very useful into the 100s of MHz, because of real delays in a practical circuit. The emitter degeneration helps, but global feedback can only do so much. Tim -- Seven Transistor Labs, LLC Electrical Engineering Consultation and Contract Design Website: http://seventransistorlabs.com
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| From | Jan Panteltje <pNa0nStpealmtje@yahoo.com> |
|---|---|
| Date | 2017-05-16 14:05 +0000 |
| Message-ID | <off0uc$e2l$1@gioia.aioe.org> |
| In reply to | #460480 |
On a sunny day (Tue, 16 May 2017 03:29:30 -0500) it happened "Tim Williams" <tiwill@seventransistorlabs.com> wrote in <ofed2o$7nr$1@dont-email.me>: >This was fun. Not bad for 3904s. >https://www.seventransistorlabs.com/Images/High_Speed_Buffer.png >See how it works with 10GHz transistors. :^) That is a classic.
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