Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > sci.electronics.design > #450905 > unrolled thread
| Started by | John Larkin <jjlarkinxyxy@highlandtechnology.com> |
|---|---|
| First post | 2017-03-08 17:11 -0800 |
| Last post | 2017-03-13 19:59 -0700 |
| Articles | 15 on this page of 75 — 33 participants |
Back to article view | Back to sci.electronics.design
why analog electronics John Larkin <jjlarkinxyxy@highlandtechnology.com> - 2017-03-08 17:11 -0800
Re: why analog electronics Tauno Voipio <tauno.voipio@notused.fi.invalid> - 2017-03-09 10:35 +0200
Re: why analog electronics Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2017-03-09 07:00 -0700
Re: why analog electronics bitrex <bitrex@de.lete.earthlink.net> - 2017-03-09 09:30 -0500
Re: why analog electronics gregz <zekor@comcast.net> - 2017-03-10 08:23 +0000
Re: why analog electronics bitrex <bitrex@de.lete.earthlink.net> - 2017-03-09 09:25 -0500
Re: why analog electronics Cursitor Doom <curd@notformail.com> - 2017-03-09 18:29 +0000
Re: why analog electronics doh@yipee.com - 2017-03-09 13:42 -0800
Re: why analog electronics Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-09 22:29 +0000
Re: why analog electronics pcdhobbs@gmail.com - 2017-03-09 14:59 -0800
Re: why analog electronics Tom Gardner <spamjunk@blueyonder.co.uk> - 2017-03-10 08:27 +0000
Re: why analog electronics Gerhard Hoffmann <ghf@hoffmann-hochfrequenz.de> - 2017-03-10 15:07 +0100
Re: why analog electronics bitrex <bitrex@de.lete.earthlink.net> - 2017-03-10 12:17 -0500
Re: why analog electronics bitrex <bitrex@de.lete.earthlink.net> - 2017-03-10 12:18 -0500
Re: why analog electronics Jeroen Belleman <jeroen@nospam.please> - 2017-03-10 13:30 +0100
Re: why analog electronics bill.sloman@ieee.org - 2017-03-13 04:06 -0700
Re: why analog electronics Sylvia Else <sylvia@not.at.this.address> - 2017-03-10 12:50 +1100
Re: why analog electronics "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-09 20:07 -0600
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-09 19:28 -0800
Re: why analog electronics "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-10 19:05 -0600
Re: why analog electronics Winfield Hill <hill@rowland.harvard.edu> - 2017-03-10 04:49 -0800
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-10 08:08 -0800
Re: why analog electronics Don Kuenz <g@crcomp.net> - 2017-03-12 02:30 +0000
Re: why analog electronics John Larkin <jjlarkinxyxy@highlandtechnology.com> - 2017-03-13 10:18 -0700
Re: why analog electronics Don Kuenz <g@crcomp.net> - 2017-03-13 22:56 +0000
Re: why analog electronics Sjouke Burry <burrynulnulfour@ppllaanneett.nnll> - 2017-03-11 00:02 +0100
Re: why analog electronics jurb6006@gmail.com - 2017-03-09 20:50 -0800
Re: why analog electronics boB@everett.wa - 2017-03-09 22:33 -0800
Re: why analog electronics krw@notreal.com - 2017-03-10 13:16 -0500
Re: why analog electronics boB <boB@theresnoplacelikehome.com> - 2017-03-10 12:24 -0800
Re: why analog electronics krw@notreal.com - 2017-03-10 20:04 -0500
Re: why analog electronics boB K7IQ <boB@everett.wa> - 2017-03-10 19:41 -0800
Re: why analog electronics djlocher56@gmail.com - 2017-03-09 22:27 -0800
Re: why analog electronics krw@notreal.com - 2017-03-10 13:17 -0500
Re: why analog electronics bulegoge@columbus.rr.com - 2017-03-10 10:51 -0800
Re: why analog electronics krw@notreal.com - 2017-03-10 20:06 -0500
Re: why analog electronics "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-10 19:09 -0600
Re: why analog electronics krw@notreal.com - 2017-03-10 22:15 -0500
Re: why analog electronics tabbypurr@gmail.com - 2017-03-10 14:12 -0800
Re: why analog electronics Jim Thompson <To-Email-Use-The-Envelope-Icon@On-My-Web-Site.com> - 2017-03-10 15:30 -0700
Re: why analog electronics tabbypurr@gmail.com - 2017-03-10 15:04 -0800
Re: why analog electronics Anthony Stewart <tony.sunnysky@gmail.com> - 2017-03-10 09:38 -0800
Re: why analog electronics boB@everett.wa - 2017-03-10 11:03 -0800
Re: why analog electronics krw@notreal.com - 2017-03-10 20:09 -0500
Re: why analog electronics boB K7IQ <boB@everett.wa> - 2017-03-10 19:50 -0800
Re: why analog electronics Joerg <news@analogconsultants.com> - 2017-03-10 12:50 -0800
Re: why analog electronics John Larkin <jjlarkinxyxy@highlandtechnology.com> - 2017-03-10 13:18 -0800
Re: why analog electronics Joerg <news@analogconsultants.com> - 2017-03-10 13:36 -0800
Re: why analog electronics George Herold <gherold@teachspin.com> - 2017-03-10 17:01 -0800
Re: why analog electronics Joerg <news@analogconsultants.com> - 2017-03-11 16:04 -0800
Re: why analog electronics "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-10 19:08 -0600
Re: why analog electronics George Herold <gherold@teachspin.com> - 2017-03-10 18:54 -0800
Re: why analog electronics "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-11 11:45 -0600
Re: why analog electronics "Tom Del Rosso" <fizzbintuesday@that-google-mail-domain.com> - 2017-03-17 22:02 -0400
Re: why analog electronics "Tim Williams" <tiwill@seventransistorlabs.com> - 2017-03-18 03:55 -0500
Re: why analog electronics boB K7IQ <boB@everett.wa> - 2017-03-10 19:56 -0800
Re: why analog electronics Tim Wescott <tim@seemywebsite.really> - 2017-03-11 12:42 -0600
Re: why analog electronics Lasse Langwadt Christensen <langwadt@fonz.dk> - 2017-03-11 13:20 -0800
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-11 14:51 -0800
Re: why analog electronics Cursitor Doom <curd@notformail.com> - 2017-03-12 13:28 +0000
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-12 10:49 -0700
Re: why analog electronics Cursitor Doom <curd@notformail.com> - 2017-03-12 21:10 +0000
Re: why analog electronics krw@notreal.com - 2017-03-12 19:29 -0400
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-12 16:49 -0700
Re: why analog electronics krw@notreal.com - 2017-03-12 21:18 -0400
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-12 19:07 -0700
Re: why analog electronics krw@notreal.com - 2017-03-12 22:43 -0400
Re: why analog electronics John Larkin <jjlarkin@highlandtechnology.com> - 2017-03-12 19:53 -0700
Re: why analog electronics krw@notreal.com - 2017-03-12 23:01 -0400
Re: why analog electronics pcdhobbs@gmail.com - 2017-03-13 07:19 -0700
Re: why analog electronics krw@notreal.com - 2017-03-13 20:39 -0400
Re: why analog electronics pcdhobbs@gmail.com - 2017-03-14 04:28 -0700
Re: why analog electronics krw@notreal.com - 2017-03-14 12:42 -0400
Re: why analog electronics Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> - 2017-03-15 09:56 -0400
Re: why analog electronics George Herold <gherold@teachspin.com> - 2017-03-13 19:59 -0700
Page 4 of 4 — ← Prev page 1 2 3 [4]
| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-03-12 10:49 -0700 |
| Message-ID | <mg2bcctgu4t9c7pbphlc68fd8cdq2t778q@4ax.com> |
| In reply to | #451461 |
On Sun, 12 Mar 2017 13:28:55 -0000 (UTC), Cursitor Doom <curd@notformail.com> wrote: >On Sat, 11 Mar 2017 14:51:51 -0800, John Larkin wrote: > >> I'm designing two boxes just now that are both 100% analog. Not a >> flipflop or gate in sight. That's refreshing. We have much higher >> markups on all-analog stuff than on mixed-signal products. > >Roland Moreno, the inventor of the smart card gave an interview to >Electronics Times and came out with this pithy observation: >"Digital is easy. Analog.... that's professional." Cool. I'll include that in my essay. -- John Larkin Highland Technology, Inc lunatic fringe electronics
[toc] | [prev] | [next] | [standalone]
| From | Cursitor Doom <curd@notformail.com> |
|---|---|
| Date | 2017-03-12 21:10 +0000 |
| Message-ID | <oa4dfl$h3o$10@dont-email.me> |
| In reply to | #451498 |
On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: > Cool. I'll include that in my essay. It's true, though. 'Digital engineers' that want their signals to switch faster or propagate faster are going to run into the unavoidable dominance of analogue effects pretty quickly. They'll very soon learn which is boss when that happens.
[toc] | [prev] | [next] | [standalone]
| From | krw@notreal.com |
|---|---|
| Date | 2017-03-12 19:29 -0400 |
| Message-ID | <2dmbccpqohqstdq48q7h7tdnpjusrge8oq@4ax.com> |
| In reply to | #451521 |
On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom <curd@notformail.com> wrote: >On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: > >> Cool. I'll include that in my essay. > >It's true, though. 'Digital engineers' that want their signals to switch >faster or propagate faster are going to run into the unavoidable >dominance of analogue effects pretty quickly. They'll very soon learn >which is boss when that happens. Let me know how easy "digital" is after you've worked on a modern microprocessor design.
[toc] | [prev] | [next] | [standalone]
| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-03-12 16:49 -0700 |
| Message-ID | <rfnbcctuhp4l6ettoa8tlhvn1oru0a01s4@4ax.com> |
| In reply to | #451521 |
On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom <curd@notformail.com> wrote: >On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: > >> Cool. I'll include that in my essay. > >It's true, though. 'Digital engineers' that want their signals to switch >faster or propagate faster are going to run into the unavoidable >dominance of analogue effects pretty quickly. They'll very soon learn >which is boss when that happens. Lots of digital design, these days, is typing VHDL or Verilog for a compiler to do mysterious things inside an FPGA. We generally have only a fuzzy idea of what actually happens inside that FPGA, and rarely control any of the details of logic implementation or place+route. A few of us design logic on PCBs where the speed of light matters. -- John Larkin Highland Technology, Inc lunatic fringe electronics
[toc] | [prev] | [next] | [standalone]
| From | krw@notreal.com |
|---|---|
| Date | 2017-03-12 21:18 -0400 |
| Message-ID | <hnsbcc5o1hun5m7bod6tpbqd7mrhlmb3af@4ax.com> |
| In reply to | #451547 |
On Sun, 12 Mar 2017 16:49:55 -0700, John Larkin <jjlarkin@highlandtechnology.com> wrote: >On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom ><curd@notformail.com> wrote: > >>On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: >> >>> Cool. I'll include that in my essay. >> >>It's true, though. 'Digital engineers' that want their signals to switch >>faster or propagate faster are going to run into the unavoidable >>dominance of analogue effects pretty quickly. They'll very soon learn >>which is boss when that happens. > >Lots of digital design, these days, is typing VHDL or Verilog for a >compiler to do mysterious things inside an FPGA. We generally have >only a fuzzy idea of what actually happens inside that FPGA, and >rarely control any of the details of logic implementation or >place+route. "Typing VHDL" is rather a large oversimplificaiton of the job. You don't know what a LUT is? >A few of us design logic on PCBs where the speed of light matters. The speed of light matters on some chip desings, too.
[toc] | [prev] | [next] | [standalone]
| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-03-12 19:07 -0700 |
| Message-ID | <m7vbcc901q0i0t0thj43me8os4hj941v5f@4ax.com> |
| In reply to | #451562 |
On Sun, 12 Mar 2017 21:18:54 -0400, krw@notreal.com wrote: >On Sun, 12 Mar 2017 16:49:55 -0700, John Larkin ><jjlarkin@highlandtechnology.com> wrote: > >>On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom >><curd@notformail.com> wrote: >> >>>On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: >>> >>>> Cool. I'll include that in my essay. >>> >>>It's true, though. 'Digital engineers' that want their signals to switch >>>faster or propagate faster are going to run into the unavoidable >>>dominance of analogue effects pretty quickly. They'll very soon learn >>>which is boss when that happens. >> >>Lots of digital design, these days, is typing VHDL or Verilog for a >>compiler to do mysterious things inside an FPGA. We generally have >>only a fuzzy idea of what actually happens inside that FPGA, and >>rarely control any of the details of logic implementation or >>place+route. > >"Typing VHDL" is rather a large oversimplificaiton of the job. You >don't know what a LUT is? Sure, but it is kind of abstract these days. We don't design with schematics any more. Heck, the compilers don't let us do some obvious things, or seem to know what we want better than we do. > >>A few of us design logic on PCBs where the speed of light matters. > >The speed of light matters on some chip desings, too. Prop delay on-chip is usually dominated by resistance and capacitance. I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 ps delay between input and output on adjacent balls. -- John Larkin Highland Technology, Inc lunatic fringe electronics
[toc] | [prev] | [next] | [standalone]
| From | krw@notreal.com |
|---|---|
| Date | 2017-03-12 22:43 -0400 |
| Message-ID | <ak1cccd4nqg563jtsfpu7boaoc188c536d@4ax.com> |
| In reply to | #451567 |
On Sun, 12 Mar 2017 19:07:20 -0700, John Larkin <jjlarkin@highlandtechnology.com> wrote: >On Sun, 12 Mar 2017 21:18:54 -0400, krw@notreal.com wrote: > >>On Sun, 12 Mar 2017 16:49:55 -0700, John Larkin >><jjlarkin@highlandtechnology.com> wrote: >> >>>On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom >>><curd@notformail.com> wrote: >>> >>>>On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: >>>> >>>>> Cool. I'll include that in my essay. >>>> >>>>It's true, though. 'Digital engineers' that want their signals to switch >>>>faster or propagate faster are going to run into the unavoidable >>>>dominance of analogue effects pretty quickly. They'll very soon learn >>>>which is boss when that happens. >>> >>>Lots of digital design, these days, is typing VHDL or Verilog for a >>>compiler to do mysterious things inside an FPGA. We generally have >>>only a fuzzy idea of what actually happens inside that FPGA, and >>>rarely control any of the details of logic implementation or >>>place+route. >> >>"Typing VHDL" is rather a large oversimplificaiton of the job. You >>don't know what a LUT is? > >Sure, but it is kind of abstract these days. We don't design with >schematics any more. Heck, the compilers don't let us do some obvious >things, or seem to know what we want better than we do. You *can* design with schematics but it's usually a waste of time. The synthesis tools do the job if you know how to use them. Hell, you can use VHDL as a netlister, if you want. >> >>>A few of us design logic on PCBs where the speed of light matters. >> >>The speed of light matters on some chip desings, too. > >Prop delay on-chip is usually dominated by resistance and capacitance. >I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 >ps delay between input and output on adjacent balls. There is a lot more to digital design than FPGAs.
[toc] | [prev] | [next] | [standalone]
| From | John Larkin <jjlarkin@highlandtechnology.com> |
|---|---|
| Date | 2017-03-12 19:53 -0700 |
| Message-ID | <e02cccpqjaltq3r35qc3fk2vudhed79deo@4ax.com> |
| In reply to | #451572 |
On Sun, 12 Mar 2017 22:43:00 -0400, krw@notreal.com wrote: >On Sun, 12 Mar 2017 19:07:20 -0700, John Larkin ><jjlarkin@highlandtechnology.com> wrote: > >>On Sun, 12 Mar 2017 21:18:54 -0400, krw@notreal.com wrote: >> >>>On Sun, 12 Mar 2017 16:49:55 -0700, John Larkin >>><jjlarkin@highlandtechnology.com> wrote: >>> >>>>On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom >>>><curd@notformail.com> wrote: >>>> >>>>>On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: >>>>> >>>>>> Cool. I'll include that in my essay. >>>>> >>>>>It's true, though. 'Digital engineers' that want their signals to switch >>>>>faster or propagate faster are going to run into the unavoidable >>>>>dominance of analogue effects pretty quickly. They'll very soon learn >>>>>which is boss when that happens. >>>> >>>>Lots of digital design, these days, is typing VHDL or Verilog for a >>>>compiler to do mysterious things inside an FPGA. We generally have >>>>only a fuzzy idea of what actually happens inside that FPGA, and >>>>rarely control any of the details of logic implementation or >>>>place+route. >>> >>>"Typing VHDL" is rather a large oversimplificaiton of the job. You >>>don't know what a LUT is? >> >>Sure, but it is kind of abstract these days. We don't design with >>schematics any more. Heck, the compilers don't let us do some obvious >>things, or seem to know what we want better than we do. > >You *can* design with schematics but it's usually a waste of time. The >synthesis tools do the job if you know how to use them. Hell, you can >use VHDL as a netlister, if you want. > >>> >>>>A few of us design logic on PCBs where the speed of light matters. >>> >>>The speed of light matters on some chip desings, too. >> >>Prop delay on-chip is usually dominated by resistance and capacitance. >>I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 >>ps delay between input and output on adjacent balls. > >There is a lot more to digital design than FPGAs. I use a lot of ECL, SiGe stuff lately. "Discrete" logic. But none of the parts that I can buy have prop delays limited by c. Typically around 10x to 10,000x worse. There is some 15 ps logic around, boutique stuff at hundreds of dollars per gate, and iffy suppliers. Eclips Plus and GigaComm are more rational, prop delays in the 200-300 ps sort of range, maybe $10 per gate. -- John Larkin Highland Technology, Inc lunatic fringe electronics
[toc] | [prev] | [next] | [standalone]
| From | krw@notreal.com |
|---|---|
| Date | 2017-03-12 23:01 -0400 |
| Message-ID | <lp2ccc9dom04i901qdj5ch0ni1cmtu8cn6@4ax.com> |
| In reply to | #451575 |
On Sun, 12 Mar 2017 19:53:52 -0700, John Larkin <jjlarkin@highlandtechnology.com> wrote: >On Sun, 12 Mar 2017 22:43:00 -0400, krw@notreal.com wrote: > >>On Sun, 12 Mar 2017 19:07:20 -0700, John Larkin >><jjlarkin@highlandtechnology.com> wrote: >> >>>On Sun, 12 Mar 2017 21:18:54 -0400, krw@notreal.com wrote: >>> >>>>On Sun, 12 Mar 2017 16:49:55 -0700, John Larkin >>>><jjlarkin@highlandtechnology.com> wrote: >>>> >>>>>On Sun, 12 Mar 2017 21:10:13 -0000 (UTC), Cursitor Doom >>>>><curd@notformail.com> wrote: >>>>> >>>>>>On Sun, 12 Mar 2017 10:49:28 -0700, John Larkin wrote: >>>>>> >>>>>>> Cool. I'll include that in my essay. >>>>>> >>>>>>It's true, though. 'Digital engineers' that want their signals to switch >>>>>>faster or propagate faster are going to run into the unavoidable >>>>>>dominance of analogue effects pretty quickly. They'll very soon learn >>>>>>which is boss when that happens. >>>>> >>>>>Lots of digital design, these days, is typing VHDL or Verilog for a >>>>>compiler to do mysterious things inside an FPGA. We generally have >>>>>only a fuzzy idea of what actually happens inside that FPGA, and >>>>>rarely control any of the details of logic implementation or >>>>>place+route. >>>> >>>>"Typing VHDL" is rather a large oversimplificaiton of the job. You >>>>don't know what a LUT is? >>> >>>Sure, but it is kind of abstract these days. We don't design with >>>schematics any more. Heck, the compilers don't let us do some obvious >>>things, or seem to know what we want better than we do. >> >>You *can* design with schematics but it's usually a waste of time. The >>synthesis tools do the job if you know how to use them. Hell, you can >>use VHDL as a netlister, if you want. >> >>>> >>>>>A few of us design logic on PCBs where the speed of light matters. >>>> >>>>The speed of light matters on some chip desings, too. >>> >>>Prop delay on-chip is usually dominated by resistance and capacitance. >>>I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 >>>ps delay between input and output on adjacent balls. >> >>There is a lot more to digital design than FPGAs. > >I use a lot of ECL, SiGe stuff lately. "Discrete" logic. But none of >the parts that I can buy have prop delays limited by c. Typically >around 10x to 10,000x worse. Key words "that I can buy". >There is some 15 ps logic around, boutique stuff at hundreds of >dollars per gate, and iffy suppliers. Eclips Plus and GigaComm are >more rational, prop delays in the 200-300 ps sort of range, maybe $10 >per gate. Now put a whole pile of those on one chip and forget the I/O between.
[toc] | [prev] | [next] | [standalone]
| From | pcdhobbs@gmail.com |
|---|---|
| Date | 2017-03-13 07:19 -0700 |
| Message-ID | <8b6ab570-d1d8-42f8-bf57-d84447bb42cf@googlegroups.com> |
| In reply to | #451572 |
>>> >>>A few of us design logic on PCBs where the speed of light matters. >> >>The speed of light matters on some chip desings, too. >> >>Prop delay on-chip is usually dominated by resistance and capacitance. >>I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 >>ps delay between input and output on adjacent balls. >There is a lot more to digital design than FPGAs Even the fatwire levels (i.e. top level metal) on logic chips have average propagation speeds around c/10 due to all the repeaters required. On-chip optics is partly a way to get round that problem. Cheers Phil Hobbs
[toc] | [prev] | [next] | [standalone]
| From | krw@notreal.com |
|---|---|
| Date | 2017-03-13 20:39 -0400 |
| Message-ID | <bseecc187hpd85o3bt20eag2e2c1en99l8@4ax.com> |
| In reply to | #451617 |
On Mon, 13 Mar 2017 07:19:14 -0700 (PDT), pcdhobbs@gmail.com wrote: >>>> >>>>A few of us design logic on PCBs where the speed of light matters. >>> >>>The speed of light matters on some chip desings, too. >>> >>>Prop delay on-chip is usually dominated by resistance and capacitance. >>>I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 >>>ps delay between input and output on adjacent balls. > >>There is a lot more to digital design than FPGAs > >Even the fatwire levels (i.e. top level metal) on logic chips have average propagation speeds around c/10 due to all the repeaters required. On-chip optics is partly a way to get round that problem. And the repeaters are there because they're faster than the same length wire without them.
[toc] | [prev] | [next] | [standalone]
| From | pcdhobbs@gmail.com |
|---|---|
| Date | 2017-03-14 04:28 -0700 |
| Message-ID | <db1afcfd-a32c-4c70-a2d9-96457caf57ed@googlegroups.com> |
| In reply to | #451711 |
>>Even the fatwire levels (i.e. top level metal) on logic chips >>have average propagation speeds around c/10 due to all the repeaters >>required. On-chip optics is partly a way to get round that problem. >And the repeaters are there because they're faster than the same >length wire without them. Yup. They slow down quadratically with length once skin effect becomes important. (showing this is an interesting math exercise.) Cheers Phil Hobbs
[toc] | [prev] | [next] | [standalone]
| From | krw@notreal.com |
|---|---|
| Date | 2017-03-14 12:42 -0400 |
| Message-ID | <b97gcclfofvjp9dbcikas6rcd21qn8pakn@4ax.com> |
| In reply to | #451765 |
On Tue, 14 Mar 2017 04:28:35 -0700 (PDT), pcdhobbs@gmail.com wrote: >>>Even the fatwire levels (i.e. top level metal) on logic chips >>>have average propagation speeds around c/10 due to all the repeaters >>>required. On-chip optics is partly a way to get round that problem. > >>And the repeaters are there because they're faster than the same >>length wire without them. > >Yup. They slow down quadratically with length once skin effect becomes important. (showing this is an interesting math exercise.) R and C both go up as a function of length, so RC goes up by the square (R dominates L).
[toc] | [prev] | [next] | [standalone]
| From | Phil Hobbs <pcdhSpamMeSenseless@electrooptical.net> |
|---|---|
| Date | 2017-03-15 09:56 -0400 |
| Message-ID | <38c8a21d-93c3-ab02-ddb1-ba46863929a3@electrooptical.net> |
| In reply to | #451780 |
On 03/14/2017 12:42 PM, krw@notreal.com wrote: > On Tue, 14 Mar 2017 04:28:35 -0700 (PDT), pcdhobbs@gmail.com wrote: > >>>> Even the fatwire levels (i.e. top level metal) on logic chips >>>> have average propagation speeds around c/10 due to all the repeaters >>>> required. On-chip optics is partly a way to get round that problem. >> >>> And the repeaters are there because they're faster than the same >>> length wire without them. >> >> Yup. They slow down quadratically with length once skin effect becomes important. (showing this is an interesting math exercise.) > > R and C both go up as a function of length, so RC goes up by the > square (R dominates L). > Yes. I was actually thinking of the skin effect loss in LC lines, which is where the actual interesting math arises. but that's not the same as the chip wiring effect, you're right. Cheers Phil Hobbs -- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
[toc] | [prev] | [next] | [standalone]
| From | George Herold <gherold@teachspin.com> |
|---|---|
| Date | 2017-03-13 19:59 -0700 |
| Message-ID | <89aa49fe-7b1d-4d06-a35a-71e73c065e6f@googlegroups.com> |
| In reply to | #450905 |
On Wednesday, March 8, 2017 at 8:11:13 PM UTC-5, John Larkin wrote: > The Brat is in the UC Berkeley MBA program, and one of her profs took > his entire class to dinner at Chez Panisse, which ran about $200 per. > He was asking about our company, and was surprised that anyone still > does analog electronics. "Isn't everything digital now?" He's not > being a jerk, he's seriously wondering why anything is analog. > > So, I'm going to write him a little essay on "why analog?" Who knows, > maybe he'll take me to Chez Panisse. I assume you'll share a copy here? Can we edit it? George H. > > > -- > > John Larkin Highland Technology, Inc > picosecond timing precision measurement > > jlarkin att highlandtechnology dott com > http://www.highlandtechnology.com
[toc] | [prev] | [standalone]
Page 4 of 4 — ← Prev page 1 2 3 [4]
Back to top | Article view | sci.electronics.design
csiph-web