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[PATCH review for 4.9 11/50] staging: vchiq_2835_arm: Make cache-line-size a required DT property

Started by"Levin, Alexander (Sasha Levin)" <alexander.levin@verizon.com>
First post2017-09-25 03:20 +0200
Last post2017-09-25 03:20 +0200
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  [PATCH review for 4.9 11/50] staging: vchiq_2835_arm: Make  cache-line-size a required DT property "Levin, Alexander (Sasha Levin)" <alexander.levin@verizon.com> - 2017-09-25 03:20 +0200

#1738628 — [PATCH review for 4.9 11/50] staging: vchiq_2835_arm: Make cache-line-size a required DT property

From"Levin, Alexander (Sasha Levin)" <alexander.levin@verizon.com>
Date2017-09-25 03:20 +0200
Subject[PATCH review for 4.9 11/50] staging: vchiq_2835_arm: Make cache-line-size a required DT property
Message-ID<utqdZ-7Fr-33@gated-at.bofh.it>
From: Michael Zoran <mzoran@crowfest.net>

[ Upstream commit 6cf1bf636a067eb308cb3a8322b9d6b1844a075d ]

The original github source allowed for the cache-line-size property
to be missing.  Since recent firmwares also require this property,
it makes sense to always require it in the driver as well.

If the cache-line-size property is missing, then the driver probe
should fail as no dev since the kernel and dt may be out of sync.
The fix is to add a check for the return value of of_property_read_u32.

Changes V2:
	1. Add error message if cache-line-size is missing.
	2. Simple check for non-zero return value from
	   of_property_read_u32.

Signed-off-by: Michael Zoran <mzoran@crowfest.net>
Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
---
 .../staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c    | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
index 1091b9f1dd07..c2286486d28e 100644
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c
@@ -106,8 +106,14 @@ int vchiq_platform_init(struct platform_device *pdev, VCHIQ_STATE_T *state)
 
 	g_virt_to_bus_offset = virt_to_dma(dev, (void *)0);
 
-	(void)of_property_read_u32(dev->of_node, "cache-line-size",
+	err = of_property_read_u32(dev->of_node, "cache-line-size",
 				   &g_cache_line_size);
+
+	if (err) {
+		dev_err(dev, "Missing cache-line-size property\n");
+		return -ENODEV;
+	}
+
 	g_fragments_size = 2 * g_cache_line_size;
 
 	/* Allocate space for the channels in coherent memory */
-- 
2.11.0

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