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Re: [RFC PATCH v1 2/9] genirq: Support shared per_cpu_devid interrupts

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  Re: [RFC PATCH v1 2/9] genirq: Support shared per_cpu_devid  interrupts Thomas Gleixner <tglx@linutronix.de> - 2017-09-25 23:10 +0200
    Re: [RFC PATCH v1 2/9] genirq: Support shared per_cpu_devid  interrupts Thomas Gleixner <tglx@linutronix.de> - 2017-09-26 14:10 +0200

#1739282 — Re: [RFC PATCH v1 2/9] genirq: Support shared per_cpu_devid interrupts

On Thu, 7 Sep 2017, Paul Burton wrote:
> Up until now per_cpu_devid interrupts have not supported sharing. On
> MIPS we have some percpu interrupts which are shared in many systems -
> a single CPU interrupt line may be used to indicate a timer interrupt,
> performance counter interrupt or fast debug channel interrupt. We have
> up until now supported this with a series of hacks, wherein drivers call
> each other's interrupt handlers & our MIPS GIC irqchip driver includes a
> hack which configures the interrupt(s) for all CPUs. In order to allow
> this mess to be cleaned up, this patch introduces support for shared
> per_cpu_devid interrupts.
> 
> The major portion of this is supporting per_cpu_devid interrupts in
> __handle_irq_event_percpu() and then making use of this, via
> handle_irq_event_percpu(), from handler_percpu_devif_irq() to invoke the
> handler for all actions associated with the shared interrupt. This does
> have a few side effects worth noting:
> 
>  - per_cpu_devid interrupts will now add to the entropy pool via
>    add_interrupt_randomness(), where they previously did not.
> 
>  - per_cpu_devid interrupts will record timings when IRQS_TIMINGS is
>    set, via record_irq_time(), where they previously did not.
> 
>  - per_cpu_devid interrupts will handle an IRQ_WAKE_THREAD return from
>    their handlers to wake a thread, where they previously did not.

That's broken because it lacks the magic synchronization which is described
in the comment in __irq_wake_thread().

> I'm not aware of any reason the above should be bad side effects, so
> sharing __handle_irq_event_percpu() for per_cpu_devid interrupts seems
> like a positive.

Now you are :)

The other side effect of this is the extra overhead. You add an extra
conditional into the main interrupt handling function
__handle_irq_event_percpu() and the extra loop and hoops overhead for
handle_percpu_devid_irq().

Thanks,

	tglx

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#1739817

On Mon, 25 Sep 2017, Thomas Gleixner wrote:

> On Thu, 7 Sep 2017, Paul Burton wrote:
> > Up until now per_cpu_devid interrupts have not supported sharing. On
> > MIPS we have some percpu interrupts which are shared in many systems -
> > a single CPU interrupt line may be used to indicate a timer interrupt,
> > performance counter interrupt or fast debug channel interrupt. We have
> > up until now supported this with a series of hacks, wherein drivers call
> > each other's interrupt handlers & our MIPS GIC irqchip driver includes a
> > hack which configures the interrupt(s) for all CPUs. In order to allow
> > this mess to be cleaned up, this patch introduces support for shared
> > per_cpu_devid interrupts.
> > 
> > The major portion of this is supporting per_cpu_devid interrupts in
> > __handle_irq_event_percpu() and then making use of this, via
> > handle_irq_event_percpu(), from handler_percpu_devif_irq() to invoke the
> > handler for all actions associated with the shared interrupt. This does
> > have a few side effects worth noting:
> > 
> >  - per_cpu_devid interrupts will now add to the entropy pool via
> >    add_interrupt_randomness(), where they previously did not.
> > 
> >  - per_cpu_devid interrupts will record timings when IRQS_TIMINGS is
> >    set, via record_irq_time(), where they previously did not.
> > 
> >  - per_cpu_devid interrupts will handle an IRQ_WAKE_THREAD return from
> >    their handlers to wake a thread, where they previously did not.
> 
> That's broken because it lacks the magic synchronization which is described
> in the comment in __irq_wake_thread().

Aside of that to make that work at all would require per cpu threads and
not a single systemwide thread.

Thanks,

	tglx

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