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Groups > linux.kernel > #1734840 > unrolled thread
| Started by | marcandre.lureau@redhat.com |
|---|---|
| First post | 2017-09-19 14:00 +0200 |
| Last post | 2017-09-19 14:00 +0200 |
| Articles | 5 — 2 participants |
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[PATCH v2 0/4] fw_cfg: add DMA operations & etc/vmcoreinfo support marcandre.lureau@redhat.com - 2017-09-19 14:00 +0200
[PATCH v2 1/4] fw_cfg: add DMA register marcandre.lureau@redhat.com - 2017-09-19 14:00 +0200
Re: [PATCH v2 1/4] fw_cfg: add DMA register kbuild test robot <lkp@intel.com> - 2017-09-22 13:10 +0200
[PATCH v2 4/4] RFC: fw_cfg: add DMA write operation in sysfs marcandre.lureau@redhat.com - 2017-09-19 14:00 +0200
[PATCH v2 2/4] fw_cfg: do DMA read operation marcandre.lureau@redhat.com - 2017-09-19 14:00 +0200
| From | marcandre.lureau@redhat.com |
|---|---|
| Date | 2017-09-19 14:00 +0200 |
| Subject | [PATCH v2 0/4] fw_cfg: add DMA operations & etc/vmcoreinfo support |
| Message-ID | <urpm2-4YB-11@gated-at.bofh.it> |
From: Marc-André Lureau <marcandre.lureau@redhat.com> Hi, This series brings DMA operations support to the fw_cfg kernel module and provide "etc/vmcoreinfo" support. At the current iteration of "[Qemu-devel] [PATCH v6 0/7] KASLR kernel dump support" patch series, a "etc/vmcoreinfo" entry is added with qemu -device vmcoreinfo, where the guest during boot or later, can write the addr/size location of a ELF note to be appended in the qemu dump. v2: - use platform device for dma mapping - add etc/vmcoreinfo patch - some code cleanups Marc-André Lureau (4): fw_cfg: add DMA register fw_cfg: do DMA read operation fw_cfg: write vmcoreinfo details RFC: fw_cfg: add DMA write operation in sysfs drivers/firmware/qemu_fw_cfg.c | 284 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 254 insertions(+), 30 deletions(-) -- 2.14.1.146.gd35faa819
[toc] | [next] | [standalone]
| From | marcandre.lureau@redhat.com |
|---|---|
| Date | 2017-09-19 14:00 +0200 |
| Subject | [PATCH v2 1/4] fw_cfg: add DMA register |
| Message-ID | <urpm2-4YB-19@gated-at.bofh.it> |
| In reply to | #1734840 |
From: Marc-André Lureau <marcandre.lureau@redhat.com>
Add an optional <dma_off> kernel module (or command line) parameter
using the following syntax:
[fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
or
[fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
and initializes the register address using given or default offset.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 53 ++++++++++++++++++++++++++++++++----------
1 file changed, 41 insertions(+), 12 deletions(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 0e2011636fbb..614037703530 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -10,20 +10,21 @@
* and select subsets of aarch64), a Device Tree node (on arm), or using
* a kernel module (or command line) parameter with the following syntax:
*
- * [fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>]
+ * [fw_cfg.]ioport=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
* or
- * [fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>]
+ * [fw_cfg.]mmio=<size>@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]
*
* where:
* <size> := size of ioport or mmio range
* <base> := physical base address of ioport or mmio range
* <ctrl_off> := (optional) offset of control register
* <data_off> := (optional) offset of data register
+ * <dma_off> := (optional) offset of dma register
*
* e.g.:
- * fw_cfg.ioport=2@0x510:0:1 (the default on x86)
+ * fw_cfg.ioport=2@0x510:0:1:4 (the default on x86)
* or
- * fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm)
+ * fw_cfg.mmio=0xA@0x9020000:8:0:16 (the default on arm)
*/
#include <linux/module.h>
@@ -63,6 +64,7 @@ static resource_size_t fw_cfg_p_size;
static void __iomem *fw_cfg_dev_base;
static void __iomem *fw_cfg_reg_ctrl;
static void __iomem *fw_cfg_reg_data;
+static void __iomem *fw_cfg_reg_dma;
/* atomic access to fw_cfg device (potentially slow i/o, so using mutex) */
static DEFINE_MUTEX(fw_cfg_dev_lock);
@@ -118,12 +120,14 @@ static void fw_cfg_io_cleanup(void)
# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64))
# define FW_CFG_CTRL_OFF 0x08
# define FW_CFG_DATA_OFF 0x00
+# define FW_CFG_DMA_OFF 0x10
# elif (defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC32)) /* ppc/mac,sun4m */
# define FW_CFG_CTRL_OFF 0x00
# define FW_CFG_DATA_OFF 0x02
# elif (defined(CONFIG_X86) || defined(CONFIG_SPARC64)) /* x86, sun4u */
# define FW_CFG_CTRL_OFF 0x00
# define FW_CFG_DATA_OFF 0x01
+# define FW_CFG_DMA_OFF 0x04
# else
# error "QEMU FW_CFG not available on this architecture!"
# endif
@@ -133,7 +137,7 @@ static void fw_cfg_io_cleanup(void)
static int fw_cfg_do_platform_probe(struct platform_device *pdev)
{
char sig[FW_CFG_SIG_SIZE];
- struct resource *range, *ctrl, *data;
+ struct resource *range, *ctrl, *data, *dma;
/* acquire i/o range details */
fw_cfg_is_mmio = false;
@@ -170,6 +174,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
/* were custom register offsets provided (e.g. on the command line)? */
ctrl = platform_get_resource_byname(pdev, IORESOURCE_REG, "ctrl");
data = platform_get_resource_byname(pdev, IORESOURCE_REG, "data");
+ dma = platform_get_resource_byname(pdev, IORESOURCE_REG, "dma");
if (ctrl && data) {
fw_cfg_reg_ctrl = fw_cfg_dev_base + ctrl->start;
fw_cfg_reg_data = fw_cfg_dev_base + data->start;
@@ -179,6 +184,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
fw_cfg_reg_data = fw_cfg_dev_base + FW_CFG_DATA_OFF;
}
+ if (dma)
+ fw_cfg_reg_dma = fw_cfg_dev_base + dma->start;
+#ifdef FW_CFG_DMA_OFF
+ else
+ fw_cfg_reg_dma = fw_cfg_dev_base + FW_CFG_DMA_OFF;
+#endif
+
/* verify fw_cfg device signature */
fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
@@ -628,6 +640,7 @@ static struct platform_device *fw_cfg_cmdline_dev;
/* use special scanf/printf modifier for phys_addr_t, resource_size_t */
#define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \
":%" __PHYS_ADDR_PREFIX "i" \
+ ":%" __PHYS_ADDR_PREFIX "i%n" \
":%" __PHYS_ADDR_PREFIX "i%n"
#define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \
@@ -637,12 +650,15 @@ static struct platform_device *fw_cfg_cmdline_dev;
":%" __PHYS_ADDR_PREFIX "u" \
":%" __PHYS_ADDR_PREFIX "u"
+#define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \
+ ":%" __PHYS_ADDR_PREFIX "u"
+
static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
{
- struct resource res[3] = {};
+ struct resource res[4] = {};
char *str;
phys_addr_t base;
- resource_size_t size, ctrl_off, data_off;
+ resource_size_t size, ctrl_off, data_off, dma_off;
int processed, consumed = 0;
/* only one fw_cfg device can exist system-wide, so if one
@@ -658,19 +674,20 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
/* consume "<size>" portion of command line argument */
size = memparse(arg, &str);
- /* get "@<base>[:<ctrl_off>:<data_off>]" chunks */
+ /* get "@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]" chunks */
processed = sscanf(str, PH_ADDR_SCAN_FMT,
&base, &consumed,
- &ctrl_off, &data_off, &consumed);
+ &ctrl_off, &data_off, &consumed,
+ &dma_off, &consumed);
- /* sscanf() must process precisely 1 or 3 chunks:
+ /* sscanf() must process precisely 1, 3 or 4 chunks:
* <base> is mandatory, optionally followed by <ctrl_off>
- * and <data_off>;
+ * and <data_off>, and <dma_off>;
* there must be no extra characters after the last chunk,
* so str[consumed] must be '\0'.
*/
if (str[consumed] ||
- (processed != 1 && processed != 3))
+ (processed != 1 && processed != 3 && process != 4))
return -EINVAL;
res[0].start = base;
@@ -687,6 +704,11 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
res[2].start = data_off;
res[2].flags = IORESOURCE_REG;
}
+ if (processed > 3) {
+ res[3].name = "dma";
+ res[3].start = dma_off;
+ res[3].flags = IORESOURCE_REG;
+ }
/* "processed" happens to nicely match the number of resources
* we need to pass in to this platform device.
@@ -721,6 +743,13 @@ static int fw_cfg_cmdline_get(char *buf, const struct kernel_param *kp)
fw_cfg_cmdline_dev->resource[0].start,
fw_cfg_cmdline_dev->resource[1].start,
fw_cfg_cmdline_dev->resource[2].start);
+ case 4:
+ return snprintf(buf, PAGE_SIZE, PH_ADDR_PR_4_FMT,
+ resource_size(&fw_cfg_cmdline_dev->resource[0]),
+ fw_cfg_cmdline_dev->resource[0].start,
+ fw_cfg_cmdline_dev->resource[1].start,
+ fw_cfg_cmdline_dev->resource[2].start,
+ fw_cfg_cmdline_dev->resource[3].start);
}
/* Should never get here */
--
2.14.1.146.gd35faa819
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| From | kbuild test robot <lkp@intel.com> |
|---|---|
| Date | 2017-09-22 13:10 +0200 |
| Subject | Re: [PATCH v2 1/4] fw_cfg: add DMA register |
| Message-ID | <usu0h-5oP-5@gated-at.bofh.it> |
| In reply to | #1734841 |
[Multipart message — attachments visible in raw view] — view raw
Hi Marc-André,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.14-rc1 next-20170922]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/marcandre-lureau-redhat-com/fw_cfg-add-DMA-operations-etc-vmcoreinfo-support/20170922-182716
config: i386-randconfig-x009-201738 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/firmware/qemu_fw_cfg.c: In function 'fw_cfg_cmdline_set':
>> drivers/firmware/qemu_fw_cfg.c:690:43: error: 'process' undeclared (first use in this function)
(processed != 1 && processed != 3 && process != 4))
^~~~~~~
drivers/firmware/qemu_fw_cfg.c:690:43: note: each undeclared identifier is reported only once for each function it appears in
vim +/process +690 drivers/firmware/qemu_fw_cfg.c
639
640 /* use special scanf/printf modifier for phys_addr_t, resource_size_t */
641 #define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \
642 ":%" __PHYS_ADDR_PREFIX "i" \
643 ":%" __PHYS_ADDR_PREFIX "i%n" \
644 ":%" __PHYS_ADDR_PREFIX "i%n"
645
646 #define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \
647 "0x%" __PHYS_ADDR_PREFIX "x"
648
649 #define PH_ADDR_PR_3_FMT PH_ADDR_PR_1_FMT \
650 ":%" __PHYS_ADDR_PREFIX "u" \
651 ":%" __PHYS_ADDR_PREFIX "u"
652
653 #define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \
654 ":%" __PHYS_ADDR_PREFIX "u"
655
656 static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp)
657 {
658 struct resource res[4] = {};
659 char *str;
660 phys_addr_t base;
661 resource_size_t size, ctrl_off, data_off, dma_off;
662 int processed, consumed = 0;
663
664 /* only one fw_cfg device can exist system-wide, so if one
665 * was processed on the command line already, we might as
666 * well stop here.
667 */
668 if (fw_cfg_cmdline_dev) {
669 /* avoid leaking previously registered device */
670 platform_device_unregister(fw_cfg_cmdline_dev);
671 return -EINVAL;
672 }
673
674 /* consume "<size>" portion of command line argument */
675 size = memparse(arg, &str);
676
677 /* get "@<base>[:<ctrl_off>:<data_off>[:<dma_off>]]" chunks */
678 processed = sscanf(str, PH_ADDR_SCAN_FMT,
679 &base, &consumed,
680 &ctrl_off, &data_off, &consumed,
681 &dma_off, &consumed);
682
683 /* sscanf() must process precisely 1, 3 or 4 chunks:
684 * <base> is mandatory, optionally followed by <ctrl_off>
685 * and <data_off>, and <dma_off>;
686 * there must be no extra characters after the last chunk,
687 * so str[consumed] must be '\0'.
688 */
689 if (str[consumed] ||
> 690 (processed != 1 && processed != 3 && process != 4))
691 return -EINVAL;
692
693 res[0].start = base;
694 res[0].end = base + size - 1;
695 res[0].flags = !strcmp(kp->name, "mmio") ? IORESOURCE_MEM :
696 IORESOURCE_IO;
697
698 /* insert register offsets, if provided */
699 if (processed > 1) {
700 res[1].name = "ctrl";
701 res[1].start = ctrl_off;
702 res[1].flags = IORESOURCE_REG;
703 res[2].name = "data";
704 res[2].start = data_off;
705 res[2].flags = IORESOURCE_REG;
706 }
707 if (processed > 3) {
708 res[3].name = "dma";
709 res[3].start = dma_off;
710 res[3].flags = IORESOURCE_REG;
711 }
712
713 /* "processed" happens to nicely match the number of resources
714 * we need to pass in to this platform device.
715 */
716 fw_cfg_cmdline_dev = platform_device_register_simple("fw_cfg",
717 PLATFORM_DEVID_NONE, res, processed);
718 if (IS_ERR(fw_cfg_cmdline_dev))
719 return PTR_ERR(fw_cfg_cmdline_dev);
720
721 return 0;
722 }
723
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
[toc] | [prev] | [next] | [standalone]
| From | marcandre.lureau@redhat.com |
|---|---|
| Date | 2017-09-19 14:00 +0200 |
| Subject | [PATCH v2 4/4] RFC: fw_cfg: add DMA write operation in sysfs |
| Message-ID | <urpm2-4YB-13@gated-at.bofh.it> |
| In reply to | #1734840 |
From: Marc-André Lureau <marcandre.lureau@redhat.com>
Since qemu 2.9, DMA write operations are allowed. However, usage of this
interface from kernel or user-space is strongly discouraged by the
maintainers. This patch is meant for experimentations for now.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 26152bfc7805..1ca3382e98df 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -524,9 +524,28 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj,
return fw_cfg_read_blob(entry->f.select, buf, pos, count, true);
}
+static ssize_t fw_cfg_sysfs_write_raw(struct file *filp, struct kobject *kobj,
+ struct bin_attribute *bin_attr,
+ char *buf, loff_t pos, size_t count)
+{
+ struct fw_cfg_sysfs_entry *entry = to_entry(kobj);
+
+ if (!fw_cfg_dma_enabled())
+ return -ENOTSUPP;
+
+ if (pos > entry->f.size)
+ return -EINVAL;
+
+ if (count > entry->f.size - pos)
+ count = entry->f.size - pos;
+
+ return fw_cfg_write_blob(entry->f.select, buf, pos, count);
+}
+
static struct bin_attribute fw_cfg_sysfs_attr_raw = {
- .attr = { .name = "raw", .mode = S_IRUSR },
+ .attr = { .name = "raw", .mode = S_IRUSR | S_IWUSR },
.read = fw_cfg_sysfs_read_raw,
+ .write = fw_cfg_sysfs_write_raw,
};
/*
--
2.14.1.146.gd35faa819
[toc] | [prev] | [next] | [standalone]
| From | marcandre.lureau@redhat.com |
|---|---|
| Date | 2017-09-19 14:00 +0200 |
| Subject | [PATCH v2 2/4] fw_cfg: do DMA read operation |
| Message-ID | <urpm2-4YB-17@gated-at.bofh.it> |
| In reply to | #1734840 |
From: Marc-André Lureau <marcandre.lureau@redhat.com>
Modify fw_cfg_read_blob() to use DMA if the device supports it.
Return errors, because the operation may fail.
This is a proof-of-concept patch with some FIXME. It uses yield() to
wait for the memory to be cleared. Help on how to improve this is
welcome.
We may also want to switch all the *buf addresses to use only
kmalloc'ed buffer (instead of using stack/image addresses with
dma=false).
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
---
drivers/firmware/qemu_fw_cfg.c | 132 +++++++++++++++++++++++++++++++++++------
1 file changed, 115 insertions(+), 17 deletions(-)
diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c
index 614037703530..a0e24fdf3ae5 100644
--- a/drivers/firmware/qemu_fw_cfg.c
+++ b/drivers/firmware/qemu_fw_cfg.c
@@ -33,6 +33,7 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/ioport.h>
+#include <linux/dma-mapping.h>
MODULE_AUTHOR("Gabriel L. Somlo <somlo@cmu.edu>");
MODULE_DESCRIPTION("QEMU fw_cfg sysfs support");
@@ -43,12 +44,25 @@ MODULE_LICENSE("GPL");
#define FW_CFG_ID 0x01
#define FW_CFG_FILE_DIR 0x19
+#define FW_CFG_VERSION_DMA 0x02
+#define FW_CFG_DMA_CTL_ERROR 0x01
+#define FW_CFG_DMA_CTL_READ 0x02
+#define FW_CFG_DMA_CTL_SKIP 0x04
+#define FW_CFG_DMA_CTL_SELECT 0x08
+#define FW_CFG_DMA_CTL_WRITE 0x10
+
/* size in bytes of fw_cfg signature */
#define FW_CFG_SIG_SIZE 4
/* fw_cfg "file name" is up to 56 characters (including terminating nul) */
#define FW_CFG_MAX_FILE_PATH 56
+/* platform device for dma mapping */
+static struct device *dev;
+
+/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */
+static u32 fw_cfg_rev;
+
/* fw_cfg file directory entry type */
struct fw_cfg_file {
u32 size;
@@ -57,6 +71,12 @@ struct fw_cfg_file {
char name[FW_CFG_MAX_FILE_PATH];
};
+struct fw_cfg_dma {
+ u32 control;
+ u32 length;
+ u64 address;
+} __packed;
+
/* fw_cfg device i/o register addresses */
static bool fw_cfg_is_mmio;
static phys_addr_t fw_cfg_p_base;
@@ -75,12 +95,73 @@ static inline u16 fw_cfg_sel_endianness(u16 key)
return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key);
}
+static inline bool fw_cfg_dma_enabled(void)
+{
+ return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma;
+}
+
+static ssize_t fw_cfg_dma_transfer(void *address, u32 length, u32 control)
+{
+ dma_addr_t dma_addr = 0;
+ struct fw_cfg_dma *d;
+ dma_addr_t dma;
+ ssize_t ret = length;
+ enum dma_data_direction dir =
+ (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0);
+
+ if (address && length) {
+ dma_addr = dma_map_single(dev, address, length, dir);
+ if (dma_mapping_error(NULL, dma_addr)) {
+ WARN(1, "%s: failed to map address\n", __func__);
+ return -EFAULT;
+ }
+ }
+
+ d = kmalloc(sizeof(*d), GFP_KERNEL | GFP_DMA);
+ if (!d) {
+ ret = -ENOMEM;
+ goto end;
+ }
+
+ dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL);
+ if (dma_mapping_error(NULL, dma)) {
+ WARN(1, "%s: failed to map fw_cfg_dma\n", __func__);
+ ret = -EFAULT;
+ goto end;
+ }
+
+ *d = (struct fw_cfg_dma) {
+ .address = cpu_to_be64(dma_addr),
+ .length = cpu_to_be32(length),
+ .control = cpu_to_be32(control)
+ };
+
+ iowrite32be(dma >> 32, fw_cfg_reg_dma);
+ iowrite32be(dma, fw_cfg_reg_dma + 4);
+ while (be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR)
+ yield(); /* FIXME: wait_event? */
+
+ if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR)
+ ret = -EIO;
+
+ dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL);
+
+end:
+ kfree(d);
+ if (dma_addr)
+ dma_unmap_single(dev, dma_addr, length, dir);
+
+ return ret;
+}
+
/* read chunk of given fw_cfg blob (caller responsible for sanity-check) */
-static inline void fw_cfg_read_blob(u16 key,
- void *buf, loff_t pos, size_t count)
+static ssize_t fw_cfg_read_blob(u16 key,
+ void *buf, loff_t pos, size_t count,
+ bool dma)
{
u32 glk = -1U;
acpi_status status;
+ ssize_t ret = count;
/* If we have ACPI, ensure mutual exclusion against any potential
* device access by the firmware, e.g. via AML methods:
@@ -90,17 +171,36 @@ static inline void fw_cfg_read_blob(u16 key,
/* Should never get here */
WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n");
memset(buf, 0, count);
- return;
+ return -EBUSY;
}
mutex_lock(&fw_cfg_dev_lock);
- iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
- while (pos-- > 0)
- ioread8(fw_cfg_reg_data);
- ioread8_rep(fw_cfg_reg_data, buf, count);
+ if (dma && fw_cfg_dma_enabled()) {
+ if (pos == 0) {
+ ret = fw_cfg_dma_transfer(buf, count, key << 16
+ | FW_CFG_DMA_CTL_SELECT
+ | FW_CFG_DMA_CTL_READ);
+ } else {
+ iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
+ ret = fw_cfg_dma_transfer(0, pos, FW_CFG_DMA_CTL_SKIP);
+ if (ret < 0)
+ goto end;
+ ret = fw_cfg_dma_transfer(buf, count,
+ FW_CFG_DMA_CTL_READ);
+ }
+ } else {
+ iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl);
+ while (pos-- > 0)
+ ioread8(fw_cfg_reg_data);
+ ioread8_rep(fw_cfg_reg_data, buf, count);
+ }
+
+end:
mutex_unlock(&fw_cfg_dev_lock);
acpi_release_global_lock(glk);
+
+ return ret;
}
/* clean up fw_cfg device i/o */
@@ -192,7 +292,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
#endif
/* verify fw_cfg device signature */
- fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE);
+ fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false);
if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) {
fw_cfg_io_cleanup();
return -ENODEV;
@@ -201,9 +301,6 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev)
return 0;
}
-/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */
-static u32 fw_cfg_rev;
-
static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char *buf)
{
return sprintf(buf, "%u\n", fw_cfg_rev);
@@ -351,8 +448,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj,
if (count > entry->f.size - pos)
count = entry->f.size - pos;
- fw_cfg_read_blob(entry->f.select, buf, pos, count);
- return count;
+ return fw_cfg_read_blob(entry->f.select, buf, pos, count, true);
}
static struct bin_attribute fw_cfg_sysfs_attr_raw = {
@@ -505,7 +601,7 @@ static int fw_cfg_register_dir_entries(void)
struct fw_cfg_file *dir;
size_t dir_size;
- fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count));
+ fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count), false);
count = be32_to_cpu(count);
dir_size = count * sizeof(struct fw_cfg_file);
@@ -513,7 +609,7 @@ static int fw_cfg_register_dir_entries(void)
if (!dir)
return -ENOMEM;
- fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size);
+ fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true);
for (i = 0; i < count; i++) {
dir[i].size = be32_to_cpu(dir[i].size);
@@ -544,9 +640,10 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
* one fw_cfg device exist system-wide, so if one was already found
* earlier, we might as well stop here.
*/
- if (fw_cfg_sel_ko)
+ if (dev)
return -EBUSY;
+ dev = &pdev->dev;
/* create by_key and by_name subdirs of /sys/firmware/qemu_fw_cfg/ */
err = -ENOMEM;
fw_cfg_sel_ko = kobject_create_and_add("by_key", fw_cfg_top_ko);
@@ -562,7 +659,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
goto err_probe;
/* get revision number, add matching top-level attribute */
- fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev));
+ fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false);
fw_cfg_rev = le32_to_cpu(fw_cfg_rev);
err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr);
if (err)
@@ -587,6 +684,7 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev)
err_name:
fw_cfg_kobj_cleanup(fw_cfg_sel_ko);
err_sel:
+ dev = NULL;
return err;
}
--
2.14.1.146.gd35faa819
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