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Groups > linux.kernel > #1732729 > unrolled thread

[PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register

Started byFahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
First post2017-09-15 08:40 +0200
Last post2017-09-19 01:40 +0200
Articles 2 — 2 participants

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  [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com> - 2017-09-15 08:40 +0200
    Re: [PATCH net] net: phy: Fix mask value write on gmii2rgmii  converter speed register David Miller <davem@davemloft.net> - 2017-09-19 01:40 +0200

#1732729 — [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register

FromFahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Date2017-09-15 08:40 +0200
Subject[PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register
Message-ID<upSs9-7sW-9@gated-at.bofh.it>
To clear Speed Selection in MDIO control register(0x10),
ie, clear bits 6 and 13 to zero while keeping other bits same.
Before AND operation,The Mask value has to be perform with bitwise NOT
operation (ie, ~ operator)

This patch clears current speed selection before writing the
new speed settings to gmii2rgmii converter

Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")

Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
 drivers/net/phy/xilinx_gmii2rgmii.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c
index d15dd39..2e5150b 100644
--- a/drivers/net/phy/xilinx_gmii2rgmii.c
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -44,7 +44,7 @@ static int xgmiitorgmii_read_status(struct phy_device *phydev)
 	priv->phy_drv->read_status(phydev);
 
 	val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG);
-	val &= XILINX_GMII2RGMII_SPEED_MASK;
+	val &= ~XILINX_GMII2RGMII_SPEED_MASK;
 
 	if (phydev->speed == SPEED_1000)
 		val |= BMCR_SPEED1000;
-- 
1.9.1

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#1734541 — Re: [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register

FromDavid Miller <davem@davemloft.net>
Date2017-09-19 01:40 +0200
SubjectRe: [PATCH net] net: phy: Fix mask value write on gmii2rgmii converter speed register
Message-ID<urdNT-4QQ-5@gated-at.bofh.it>
In reply to#1732729
From: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
Date: Fri, 15 Sep 2017 12:01:58 +0530

> To clear Speed Selection in MDIO control register(0x10),
> ie, clear bits 6 and 13 to zero while keeping other bits same.
> Before AND operation,The Mask value has to be perform with bitwise NOT
> operation (ie, ~ operator)
> 
> This patch clears current speed selection before writing the
> new speed settings to gmii2rgmii converter
> 
> Fixes: f411a6160bd4 ("net: phy: Add gmiitorgmii converter support")
> 
> Signed-off-by: Fahad Kunnathadi <fahad.kunnathadi@dexceldesigns.com>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>

Applied and queued up for -stable, thanks.

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