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| Started by | Will Deacon <will.deacon@arm.com> |
|---|---|
| First post | 2017-09-18 19:10 +0200 |
| Last post | 2017-09-18 19:10 +0200 |
| Articles | 1 — 1 participant |
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Re: [RFC PATCH v3] membarrier: provide core serialization Will Deacon <will.deacon@arm.com> - 2017-09-18 19:10 +0200
| From | Will Deacon <will.deacon@arm.com> |
|---|---|
| Date | 2017-09-18 19:10 +0200 |
| Subject | Re: [RFC PATCH v3] membarrier: provide core serialization |
| Message-ID | <ur7Iu-EQ-15@gated-at.bofh.it> |
On Thu, Sep 07, 2017 at 05:03:49PM -0700, Hans Boehm wrote: > > [Mathieu: ] > > > > Assuming we don't need a sync core before updating the old code, an > > aggressive approach would be: > > > > reclaim and re-use (aggressive): > > > > 1- userspace unpublish all reference to old code, > > 2- userspace ensure no thread use the old code anymore (e.g. URCU), > > 3- userspace updates old code -> new code > > 4- issue data cache flush for the modified range (if needed) > > 5- sys_membarrier > > - for each executing threads > > - issue core serializing barrier > > 6- issue instruction cache flush for the modified range (if needed) > > (may be required on all active threads on some architectures) > > 7- userspace publish reference to new code > > > My assumption was that right sequence here, at least on Aarch64, is to > do 5 and 6 in the opposite order; flush the icache,which I believe can > be done from the thread that wrote the code, and then issue a sys_membarrier > for the core serializing barrier. > > It would be useful to get that clarified. FWIW, Mathieu and I spent a while talking about this during LPC last week and ended up agreeing that the ISB (core serialisation) is required *after* the cache-maintenance to publish the new code has completed. Will
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