Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1731748 > unrolled thread
| Started by | Rob Herring <robh@kernel.org> |
|---|---|
| First post | 2017-09-13 19:50 +0200 |
| Last post | 2017-09-18 13:40 +0200 |
| Articles | 2 — 2 participants |
Back to article view | Back to linux.kernel
This discussion starts older than the indexed window; earlier articles aren't shown. The article labeled Started by
below is the oldest one visible, not the original post.
Re: [PATCH V3] clk: qcom: Add spmi_pmic clock divider support Rob Herring <robh@kernel.org> - 2017-09-13 19:50 +0200
Re: [PATCH V3] clk: qcom: Add spmi_pmic clock divider support Tirupathi Reddy T <tirupath@codeaurora.org> - 2017-09-18 13:40 +0200
| From | Rob Herring <robh@kernel.org> |
|---|---|
| Date | 2017-09-13 19:50 +0200 |
| Subject | Re: [PATCH V3] clk: qcom: Add spmi_pmic clock divider support |
| Message-ID | <upjXr-1Yv-3@gated-at.bofh.it> |
On Wed, Sep 06, 2017 at 05:30:07PM +0530, Tirupathi Reddy wrote:
> Clkdiv module provides a clock output on the PMIC with CXO as
> the source. This clock can be routed through PMIC GPIOs. Add
> a device driver to configure this clkdiv module.
>
> Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
> ---
> .../bindings/clock/clk-spmi-pmic-div.txt | 51 +++
> drivers/clk/qcom/Kconfig | 9 +
> drivers/clk/qcom/Makefile | 1 +
> drivers/clk/qcom/clk-spmi-pmic-div.c | 342 +++++++++++++++++++++
> 4 files changed, 403 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
> create mode 100644 drivers/clk/qcom/clk-spmi-pmic-div.c
>
> diff --git a/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
> new file mode 100644
> index 0000000..8b84b32
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
> @@ -0,0 +1,51 @@
> +Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
> +
> +clkdiv configures the clock frequency of a set of outputs on the PMIC.
> +These clocks are typically wired through alternate functions on
> +gpio pins.
> +
> +=======================
> +Properties
> +=======================
> +
> +- compatible
> + Usage: required
> + Value type: <string>
> + Definition: must be one of:
> + "qcom,spmi-clkdiv"
If this is not a fallback, drop it.
> + "qcom,pm8998-clkdiv"
> +
> +- reg
> + Usage: required
> + Value type: <prop-encoded-array>
> + Definition: Addresses and sizes for the memory of this CLKDIV
> + peripheral.
> +
> +- clocks:
> + Usage: required
> + Value type: <prop-encoded-array>
> + Definition: reference to the xo clock.
> +
> +- clock-names:
> + Usage: required
> + Value type: <stringlist>
> + Definition: must be "xo".
Missing #clock-cells
> +
> +=======
> +Example
> +=======
> +
> +pm8998_clk_divs: qcom,clkdiv@5b00 {
clock@5b00
> + compatible = "qcom,pm8998-clkdiv";
> + reg = <0x5b00>;
> + #clock-cells = <1>;
> + clocks = <&xo_board>;
> + clock-names = "xo";
> +
> + assigned-clocks = <&pm8998_clk_divs 1>,
> + <&pm8998_clk_divs 2>,
> + <&pm8998_clk_divs 3>;
> + assigned-clock-rates = <9600000>,
> + <9600000>,
> + <9600000>;
> +};
[toc] | [next] | [standalone]
| From | Tirupathi Reddy T <tirupath@codeaurora.org> |
|---|---|
| Date | 2017-09-18 13:40 +0200 |
| Message-ID | <ur2z8-5Ip-33@gated-at.bofh.it> |
| In reply to | #1731748 |
On 9/13/2017 11:10 PM, Rob Herring wrote:
> On Wed, Sep 06, 2017 at 05:30:07PM +0530, Tirupathi Reddy wrote:
>> Clkdiv module provides a clock output on the PMIC with CXO as
>> the source. This clock can be routed through PMIC GPIOs. Add
>> a device driver to configure this clkdiv module.
>>
>> Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
>> ---
>> .../bindings/clock/clk-spmi-pmic-div.txt | 51 +++
>> drivers/clk/qcom/Kconfig | 9 +
>> drivers/clk/qcom/Makefile | 1 +
>> drivers/clk/qcom/clk-spmi-pmic-div.c | 342 +++++++++++++++++++++
>> 4 files changed, 403 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
>> create mode 100644 drivers/clk/qcom/clk-spmi-pmic-div.c
>>
>> diff --git a/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
>> new file mode 100644
>> index 0000000..8b84b32
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt
>> @@ -0,0 +1,51 @@
>> +Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)
>> +
>> +clkdiv configures the clock frequency of a set of outputs on the PMIC.
>> +These clocks are typically wired through alternate functions on
>> +gpio pins.
>> +
>> +=======================
>> +Properties
>> +=======================
>> +
>> +- compatible
>> + Usage: required
>> + Value type: <string>
>> + Definition: must be one of:
>> + "qcom,spmi-clkdiv"
> If this is not a fallback, drop it.
Here "qcom,spmi-clkdiv" is used as generic string for registering only
one clk and
the pmic specific strings are used for registering more than one clk
following
the given base address in "reg" property.
>
>> + "qcom,pm8998-clkdiv"
>> +
>> +- reg
>> + Usage: required
>> + Value type: <prop-encoded-array>
>> + Definition: Addresses and sizes for the memory of this CLKDIV
>> + peripheral.
>> +
>> +- clocks:
>> + Usage: required
>> + Value type: <prop-encoded-array>
>> + Definition: reference to the xo clock.
>> +
>> +- clock-names:
>> + Usage: required
>> + Value type: <stringlist>
>> + Definition: must be "xo".
> Missing #clock-cells
Added in next patch set.
>
>> +
>> +=======
>> +Example
>> +=======
>> +
>> +pm8998_clk_divs: qcom,clkdiv@5b00 {
> clock@5b00
Addressed in next patch.
>
>> + compatible = "qcom,pm8998-clkdiv";
>> + reg = <0x5b00>;
>> + #clock-cells = <1>;
>> + clocks = <&xo_board>;
>> + clock-names = "xo";
>> +
>> + assigned-clocks = <&pm8998_clk_divs 1>,
>> + <&pm8998_clk_divs 2>,
>> + <&pm8998_clk_divs 3>;
>> + assigned-clock-rates = <9600000>,
>> + <9600000>,
>> + <9600000>;
>> +};
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web