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[PATCH 0/3] iio: trigger: stm32-timers fixes

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  [PATCH 0/3] iio: trigger: stm32-timers fixes Fabrice Gasnier <fabrice.gasnier@st.com> - 2017-09-18 12:10 +0200
    [PATCH 1/3] iio: trigger: stm32-timer: preset shouldn't be buffered Fabrice Gasnier <fabrice.gasnier@st.com> - 2017-09-18 12:10 +0200
      Re: [PATCH 1/3] iio: trigger: stm32-timer: preset shouldn't be  buffered Jonathan Cameron <jic23@kernel.org> - 2017-09-24 14:10 +0200

#1734001 — [PATCH 0/3] iio: trigger: stm32-timers fixes

This fixes misc corner cases observed when using stm32-timers:
- reload value is shadowed, after 1st write, or when doing successive 
  configurations (using sampling_frequency, then counter)
- clock needs to be enabled before using master->slave configuration

Fabrice Gasnier (3):
  iio: trigger: stm32-timer: preset shouldn't be buffered
  iio: trigger: stm32-timer: fix a corner case to write preset
  iio: trigger: stm32-timer: enable clock when in master mode

 drivers/iio/trigger/stm32-timer-trigger.c | 64 ++++++++++++++++++++++---------
 1 file changed, 45 insertions(+), 19 deletions(-)

-- 
1.9.1

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#1734005 — [PATCH 1/3] iio: trigger: stm32-timer: preset shouldn't be buffered

Currently, setting preset value (ARR) will update directly 'Auto reload
value' only on 1st write access. But then, ARPE is set. This makes
ARR a shadow register. Preset value should be updated upon each
write request: ensure ARPE is 0. This fixes successive writes to
preset attribute.

Fixes: 4adec7da0536 ("iio: stm32 trigger: Add quadrature encoder device")

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
 drivers/iio/trigger/stm32-timer-trigger.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c
index 9b90534..34cc25b 100644
--- a/drivers/iio/trigger/stm32-timer-trigger.c
+++ b/drivers/iio/trigger/stm32-timer-trigger.c
@@ -715,8 +715,9 @@ static ssize_t stm32_count_set_preset(struct iio_dev *indio_dev,
 	if (ret)
 		return ret;
 
+	/* TIMx_ARR register shouldn't be buffered (ARPE=0) */
+	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
 	regmap_write(priv->regmap, TIM_ARR, preset);
-	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
 
 	return len;
 }
-- 
1.9.1

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#1738172 — Re: [PATCH 1/3] iio: trigger: stm32-timer: preset shouldn't be buffered

On Mon, 18 Sep 2017 12:05:30 +0200
Fabrice Gasnier <fabrice.gasnier@st.com> wrote:

> Currently, setting preset value (ARR) will update directly 'Auto reload
> value' only on 1st write access. But then, ARPE is set. This makes
> ARR a shadow register. Preset value should be updated upon each
> write request: ensure ARPE is 0. This fixes successive writes to
> preset attribute.
> 
> Fixes: 4adec7da0536 ("iio: stm32 trigger: Add quadrature encoder device")
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>

Applied to the fixes-togreg-post-rc1 branch of iio.git and marked
for stable.

Thanks,

Jonathan

> ---
>  drivers/iio/trigger/stm32-timer-trigger.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/trigger/stm32-timer-trigger.c b/drivers/iio/trigger/stm32-timer-trigger.c
> index 9b90534..34cc25b 100644
> --- a/drivers/iio/trigger/stm32-timer-trigger.c
> +++ b/drivers/iio/trigger/stm32-timer-trigger.c
> @@ -715,8 +715,9 @@ static ssize_t stm32_count_set_preset(struct iio_dev *indio_dev,
>  	if (ret)
>  		return ret;
>  
> +	/* TIMx_ARR register shouldn't be buffered (ARPE=0) */
> +	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, 0);
>  	regmap_write(priv->regmap, TIM_ARR, preset);
> -	regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_ARPE, TIM_CR1_ARPE);
>  
>  	return len;
>  }

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