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Groups > linux.kernel > #1731489 > unrolled thread
| Started by | Huacai Chen <chenhc@lemote.com> |
|---|---|
| First post | 2017-09-13 11:20 +0200 |
| Last post | 2017-09-14 03:20 +0200 |
| Articles | 3 — 3 participants |
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[PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode Huacai Chen <chenhc@lemote.com> - 2017-09-13 11:20 +0200
Re: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode Andrew Morton <akpm@linux-foundation.org> - 2017-09-14 00:00 +0200
Re: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent DMA mode "陈华才" <chenhc@lemote.com> - 2017-09-14 03:20 +0200
| From | Huacai Chen <chenhc@lemote.com> |
|---|---|
| Date | 2017-09-13 11:20 +0200 |
| Subject | [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode |
| Message-ID | <upbZU-5r0-21@gated-at.bofh.it> |
In non-coherent DMA mode, kernel uses cache flushing operations to maintain I/O coherency, so the dmapool objects should be aligned to ARCH_DMA_MINALIGN. Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen <chenhc@lemote.com> --- mm/dmapool.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/mm/dmapool.c b/mm/dmapool.c index 4d90a64..2ac6f4a 100644 --- a/mm/dmapool.c +++ b/mm/dmapool.c @@ -140,6 +140,9 @@ struct dma_pool *dma_pool_create(const char *name, struct device *dev, else if (align & (align - 1)) return NULL; + if (!plat_device_is_coherent(dev)) + align = max_t(size_t, align, dma_get_cache_alignment()); + if (size == 0) return NULL; else if (size < 4) -- 2.7.0
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| From | Andrew Morton <akpm@linux-foundation.org> |
|---|---|
| Date | 2017-09-14 00:00 +0200 |
| Subject | Re: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN in non-coherent DMA mode |
| Message-ID | <upnRn-4qH-7@gated-at.bofh.it> |
| In reply to | #1731489 |
On Wed, 13 Sep 2017 17:20:51 +0800 Huacai Chen <chenhc@lemote.com> wrote: > In non-coherent DMA mode, kernel uses cache flushing operations to > maintain I/O coherency, so the dmapool objects should be aligned to > ARCH_DMA_MINALIGN. What are the user-visible effects of this bug?
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| From | "陈华才" <chenhc@lemote.com> |
|---|---|
| Date | 2017-09-14 03:20 +0200 |
| Subject | Re: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent DMA mode |
| Message-ID | <upqYW-6zf-3@gated-at.bofh.it> |
| In reply to | #1731955 |
Hi, Andrew, It will cause data corruption, at least on MIPS: step 1, dma_map_single step 2, cache_invalidate (no writeback) step 3, dma_from_device step 4, dma_unmap_single If a DMA buffer and a kernel structure share a same cache line, and if the kernel structure has dirty data, cache_invalidate (no writeback) may cause data lost. Huacai ------------------ Original ------------------ From: "Andrew Morton"<akpm@linux-foundation.org>; Date: Thu, Sep 14, 2017 05:52 AM To: "Huacai Chen"<chenhc@lemote.com>; Cc: "Fuxin Zhang"<zhangfx@lemote.com>; "linux-mm"<linux-mm@kvack.org>; "linux-kernel"<linux-kernel@vger.kernel.org>; "stable"<stable@vger.kernel.org>; Subject: Re: [PATCH V3 2/3] mm: dmapool: Align to ARCH_DMA_MINALIGN innon-coherent DMA mode On Wed, 13 Sep 2017 17:20:51 +0800 Huacai Chen <chenhc@lemote.com> wrote: > In non-coherent DMA mode, kernel uses cache flushing operations to > maintain I/O coherency, so the dmapool objects should be aligned to > ARCH_DMA_MINALIGN. What are the user-visible effects of this bug?
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