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| Started by | Bin Meng <bmeng.cn@gmail.com> |
|---|---|
| First post | 2017-09-11 11:40 +0200 |
| Last post | 2017-09-11 11:40 +0200 |
| Articles | 1 — 1 participant |
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[PATCH v2 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() Bin Meng <bmeng.cn@gmail.com> - 2017-09-11 11:40 +0200
| From | Bin Meng <bmeng.cn@gmail.com> |
|---|---|
| Date | 2017-09-11 11:40 +0200 |
| Subject | [PATCH v2 06/10] spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in intel_spi_write() |
| Message-ID | <uotma-15R-7@gated-at.bofh.it> |
So far intel_spi_write() uses the HW sequencer to do the write. But the HW sequencer register HSFSTS_CTL does not have such a field for 'Atomic Cycle Sequence', remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> --- Changes in v2: None drivers/mtd/spi-nor/intel-spi.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index d0237fe..757b9f1 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -572,11 +572,6 @@ static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len, val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE; val |= (block_size - 1) << HSFSTS_CTL_FDBC_SHIFT; val |= HSFSTS_CTL_FCYCLE_WRITE; - - /* Write enable */ - if (ispi->preopcodes[1] == SPINOR_OP_WREN) - val |= SSFSTS_CTL_SPOP; - val |= SSFSTS_CTL_ACS; writel(val, ispi->base + HSFSTS_CTL); ret = intel_spi_write_block(ispi, write_buf, block_size); -- 2.9.2
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