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Groups > linux.kernel > #1729096 > unrolled thread
| Started by | Georgi Djakov <georgi.djakov@linaro.org> |
|---|---|
| First post | 2017-09-08 19:20 +0200 |
| Last post | 2017-09-08 22:20 +0200 |
| Articles | 5 — 2 participants |
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[PATCH v3 0/3] Introduce on-chip interconnect API Georgi Djakov <georgi.djakov@linaro.org> - 2017-09-08 19:20 +0200
[PATCH v3 3/3] interconnect: Add Qualcomm msm8916 interconnect provider driver Georgi Djakov <georgi.djakov@linaro.org> - 2017-09-08 19:20 +0200
[RFC v3 2/3] interconnect: Add basic event tracing Georgi Djakov <georgi.djakov@linaro.org> - 2017-09-08 19:20 +0200
Re: [RFC v3 2/3] interconnect: Add basic event tracing Steven Rostedt <rostedt@goodmis.org> - 2017-09-08 20:20 +0200
Re: [RFC v3 2/3] interconnect: Add basic event tracing Georgi Djakov <georgi.djakov@linaro.org> - 2017-09-08 22:20 +0200
| From | Georgi Djakov <georgi.djakov@linaro.org> |
|---|---|
| Date | 2017-09-08 19:20 +0200 |
| Subject | [PATCH v3 0/3] Introduce on-chip interconnect API |
| Message-ID | <unv6F-1yj-3@gated-at.bofh.it> |
Modern SoCs have multiple processors and various dedicated cores (video, gpu,
graphics, modem). These cores are talking to each other and can generate a lot
of data flowing through the on-chip interconnects. These interconnect buses
could form different topologies such as crossbar, point to point buses,
hierarchical buses or use the network-on-chip concept.
These buses have been sized usually to handle use cases with high data
throughput but it is not necessary all the time and consume a lot of power.
Furthermore, the priority between masters can vary depending on the running
use case like video playback or cpu intensive tasks.
Having an API to control the requirement of the system in term of bandwidth
and QoS, so we can adapt the interconnect configuration to match those by
scaling the frequencies, setting link priority and tuning QoS parameters.
This configuration can be a static, one-time operation done at boot for some
platforms or a dynamic set of operations that happen at run-time.
This patchset introduce a new API to get the requirement and configure the
interconnect buses across the entire chipset to fit with the current demand.
The API is NOT for changing the performance of the endpoint devices, but only
the interconnect path in between them.
The API is using a consumer/provider-based model, where the providers are
the interconnect buses and the consumers could be various drivers.
The consumers request interconnect resources (path) to an endpoint and set
the desired constraints on this data flow path. The provider(s) receive
requests from consumers and aggregate these requests for all master-slave
pairs on that path. Then the providers configure each participating in the
topology node according to the requested data flow path, physical links and
constraints. The topology could be complicated and multi-tiered and is SoC
specific.
Below is a simplified diagram of a real-world SoC topology. The interconnect
providers are the NoCs.
+----------------+ +----------------+
| HW Accelerator |--->| M NoC |<---------------+
+----------------+ +----------------+ |
| | +------------+
+-----+ +-------------+ V +------+ | |
| DDR | | +--------+ | PCIe | | |
+-----+ | | Slaves | +------+ | |
^ ^ | +--------+ | | C NoC |
| | V V | |
+------------------+ +------------------------+ | | +-----+
| |-->| |-->| |-->| CPU |
| |-->| |<--| | +-----+
| Mem NoC | | S NoC | +------------+
| |<--| |---------+ |
| |<--| |<------+ | | +--------+
+------------------+ +------------------------+ | | +-->| Slaves |
^ ^ ^ ^ ^ | | +--------+
| | | | | | V
+------+ | +-----+ +-----+ +---------+ +----------------+ +--------+
| CPUs | | | GPU | | DSP | | Masters |-->| P NoC |-->| Slaves |
+------+ | +-----+ +-----+ +---------+ +----------------+ +--------+
|
+-------+
| Modem |
+-------+
This patchset does not implement all features but only main skeleton to check
the validity of the proposal.
TODO:
* Constraints are currently stored in internal data structure. Should PM QoS
be used instead?
* Extend interconect_set() to handle parameters such as latency and other QoS
values.
* Cache the path between the nodes instead of walking the graph on each get().
* Sync interconnect requests with the idle state of the device.
* Replace dev_id string names resource lookups with integer ids.
Summary of the patches:
Patch 1 introduces the interconnect API.
Patch 2 add basic support for tracepoints
Patch 3 creates the first vendor specific interconnect bus driver.
Changes since patchset v2 (https://lkml.org/lkml/2017/7/20/825)
* Split the aggregation into per node and per provider. Cache the
aggregated values.
* Various small refactorings and cleanups in the framework.
* Added a patch introducing basic tracepoint support for monitoring
the time required to update the interconnect nodes.
Changes since patchset v1 (https://lkml.org/lkml/2017/6/27/890)
* Updates in the documentation.
* Changes in request aggregation, locking.
* Dropped the aggregate() callback and use the default as it currently
sufficient for the single vendor driver. Will add it later when needed.
* Dropped the dt-bindings draft patch for now.
Changes since RFC v2 (https://lkml.org/lkml/2017/6/12/316)
* Converted documentation to rst format.
* Fixed an incorrect call to mutex_lock. Renamed max_bw to peak_bw.
Changes since RFC v1 (https://lkml.org/lkml/2017/5/15/605)
* Refactored code into shorter functions.
* Added a new aggregate() API function.
* Rearranged some structs to reduce padding bytes.
Changes since RFC v0 (https://lkml.org/lkml/2017/3/1/599)
* Removed DT support and added optional Patch 3 with new bindings proposal.
* Converted the topology into internal driver data.
* Made the framework modular.
* interconnect_get() now takes (src and dst ports as arguments).
* Removed public declarations of some structs.
* Now passing prev/next nodes to the vendor driver.
* Properly remove requests on _put().
* Added refcounting.
* Updated documentation.
* Changed struct interconnect_path to use array instead of linked list.
Georgi Djakov (3):
interconnect: Add generic on-chip interconnect API
interconnect: Add basic event tracing
interconnect: Add Qualcomm msm8916 interconnect provider driver
Documentation/interconnect/interconnect.rst | 93 ++++++
drivers/Kconfig | 2 +
drivers/Makefile | 1 +
drivers/interconnect/Kconfig | 15 +
drivers/interconnect/Makefile | 2 +
drivers/interconnect/interconnect.c | 389 +++++++++++++++++++++++
drivers/interconnect/qcom/Kconfig | 11 +
drivers/interconnect/qcom/Makefile | 1 +
drivers/interconnect/qcom/interconnect_msm8916.c | 375 ++++++++++++++++++++++
include/linux/interconnect-consumer.h | 73 +++++
include/linux/interconnect-provider.h | 119 +++++++
include/linux/interconnect/qcom-msm8916.h | 92 ++++++
include/trace/events/interconnect.h | 45 +++
13 files changed, 1218 insertions(+)
create mode 100644 Documentation/interconnect/interconnect.rst
create mode 100644 drivers/interconnect/Kconfig
create mode 100644 drivers/interconnect/Makefile
create mode 100644 drivers/interconnect/interconnect.c
create mode 100644 drivers/interconnect/qcom/Kconfig
create mode 100644 drivers/interconnect/qcom/Makefile
create mode 100644 drivers/interconnect/qcom/interconnect_msm8916.c
create mode 100644 include/linux/interconnect-consumer.h
create mode 100644 include/linux/interconnect-provider.h
create mode 100644 include/linux/interconnect/qcom-msm8916.h
create mode 100644 include/trace/events/interconnect.h
[toc] | [next] | [standalone]
| From | Georgi Djakov <georgi.djakov@linaro.org> |
|---|---|
| Date | 2017-09-08 19:20 +0200 |
| Subject | [PATCH v3 3/3] interconnect: Add Qualcomm msm8916 interconnect provider driver |
| Message-ID | <unv6G-1yj-7@gated-at.bofh.it> |
| In reply to | #1729096 |
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms. This patch contains only a partial topology to make reviewing
easier.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
---
drivers/interconnect/Kconfig | 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 11 +
drivers/interconnect/qcom/Makefile | 1 +
drivers/interconnect/qcom/interconnect_msm8916.c | 375 +++++++++++++++++++++++
include/linux/interconnect/qcom-msm8916.h | 92 ++++++
6 files changed, 485 insertions(+)
create mode 100644 drivers/interconnect/qcom/Kconfig
create mode 100644 drivers/interconnect/qcom/Makefile
create mode 100644 drivers/interconnect/qcom/interconnect_msm8916.c
create mode 100644 include/linux/interconnect/qcom-msm8916.h
diff --git a/drivers/interconnect/Kconfig b/drivers/interconnect/Kconfig
index 1e50e951cdc1..b123a76e2f9d 100644
--- a/drivers/interconnect/Kconfig
+++ b/drivers/interconnect/Kconfig
@@ -8,3 +8,8 @@ menuconfig INTERCONNECT
If unsure, say no.
+if INTERCONNECT
+
+source "drivers/interconnect/qcom/Kconfig"
+
+endif
diff --git a/drivers/interconnect/Makefile b/drivers/interconnect/Makefile
index d9da6a6c3560..62a01de24aeb 100644
--- a/drivers/interconnect/Makefile
+++ b/drivers/interconnect/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_INTERCONNECT) += interconnect.o
+obj-$(CONFIG_INTERCONNECT_QCOM) += qcom/
diff --git a/drivers/interconnect/qcom/Kconfig b/drivers/interconnect/qcom/Kconfig
new file mode 100644
index 000000000000..86465dc37bd4
--- /dev/null
+++ b/drivers/interconnect/qcom/Kconfig
@@ -0,0 +1,11 @@
+config INTERCONNECT_QCOM
+ bool "Qualcomm Network-on-Chip interconnect drivers"
+ depends on INTERCONNECT
+ depends on ARCH_QCOM || COMPILE_TEST
+ default y
+
+config INTERCONNECT_QCOM_MSM8916
+ tristate "Qualcomm MSM8916 interconnect driver"
+ depends on INTERCONNECT_QCOM
+ help
+ This is a driver for the Qualcomm Network-on-Chip on msm8916-based platforms.
diff --git a/drivers/interconnect/qcom/Makefile b/drivers/interconnect/qcom/Makefile
new file mode 100644
index 000000000000..0831080e1100
--- /dev/null
+++ b/drivers/interconnect/qcom/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_INTERCONNECT_QCOM_MSM8916) += interconnect_msm8916.o
diff --git a/drivers/interconnect/qcom/interconnect_msm8916.c b/drivers/interconnect/qcom/interconnect_msm8916.c
new file mode 100644
index 000000000000..9b001e100974
--- /dev/null
+++ b/drivers/interconnect/qcom/interconnect_msm8916.c
@@ -0,0 +1,375 @@
+/*
+ * Copyright (C) 2017 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/device.h>
+#include <linux/io.h>
+#include <linux/interconnect-provider.h>
+#include <linux/interconnect/qcom-msm8916.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+
+#define to_qcom_icp(_icp) \
+ container_of(_icp, struct qcom_interconnect_provider, icp)
+#define to_qcom_node(_node) \
+ container_of(_node, struct qcom_interconnect_node, node)
+
+enum qcom_bus_type {
+ QCOM_BUS_TYPE_NOC = 0,
+ QCOM_BUS_TYPE_MEM,
+};
+
+struct qcom_interconnect_provider {
+ struct icp icp;
+ void __iomem *base;
+ struct clk *bus_clk;
+ struct clk *bus_a_clk;
+ u32 base_offset;
+ u32 qos_offset;
+ enum qcom_bus_type type;
+};
+
+struct qcom_interconnect_node {
+ struct interconnect_node node;
+ unsigned char *name;
+ struct interconnect_node *links[8];
+ u16 id;
+ u16 num_links;
+ u16 port;
+ u16 buswidth;
+ u64 rate;
+};
+
+static struct qcom_interconnect_node snoc_int_0;
+static struct qcom_interconnect_node snoc_int_1;
+static struct qcom_interconnect_node snoc_int_bimc;
+static struct qcom_interconnect_node snoc_bimc_0_mas;
+static struct qcom_interconnect_node pnoc_snoc_slv;
+
+static struct qcom_interconnect_node snoc_bimc_0_slv;
+static struct qcom_interconnect_node slv_ebi_ch0;
+
+static struct qcom_interconnect_node pnoc_int_1;
+static struct qcom_interconnect_node mas_pnoc_sdcc_1;
+static struct qcom_interconnect_node mas_pnoc_sdcc_2;
+static struct qcom_interconnect_node pnoc_snoc_mas;
+
+struct qcom_interconnect_desc {
+ struct qcom_interconnect_node **nodes;
+ size_t num_nodes;
+};
+
+static struct qcom_interconnect_node snoc_int_0 = {
+ .id = 10004,
+ .name = "snoc-int-0",
+#if 0
+ .links = { &snoc_pnoc_mas.node },
+ .num_links = 1,
+#endif
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node snoc_int_1 = {
+ .id = 10005,
+ .name = "snoc-int-1",
+#if 0
+ .links = { &slv_apss.node, &slv_cats_0.node, &slv_cats_1.node },
+ .num_links = 3,
+#endif
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node snoc_int_bimc = {
+ .id = 10006,
+ .name = "snoc-bimc",
+ .links = { &snoc_bimc_0_mas.node },
+ .num_links = 1,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node snoc_bimc_0_mas = {
+ .id = 10007,
+ .name = "snoc-bimc-0-mas",
+ .links = { &snoc_bimc_0_slv.node },
+ .num_links = 1,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node pnoc_snoc_slv = {
+ .id = 10011,
+ .name = "snoc-pnoc",
+ .links = { &snoc_int_0.node, &snoc_int_bimc.node, &snoc_int_1.node },
+ .num_links = 3,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node *msm8916_snoc_nodes[] = {
+ [SNOC_INT_0] = &snoc_int_0,
+ [SNOC_INT_1] = &snoc_int_1,
+ [SNOC_INT_BIMC] = &snoc_int_bimc,
+ [SNOC_BIMC_0_MAS] = &snoc_bimc_0_mas,
+ [PNOC_SNOC_SLV] = &pnoc_snoc_slv,
+};
+
+static struct qcom_interconnect_desc msm8916_snoc = {
+ .nodes = msm8916_snoc_nodes,
+ .num_nodes = ARRAY_SIZE(msm8916_snoc_nodes),
+};
+
+static struct qcom_interconnect_node snoc_bimc_0_slv = {
+ .id = 10025,
+ .name = "snoc_bimc_0_slv",
+ .links = { &slv_ebi_ch0.node },
+ .num_links = 1,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node slv_ebi_ch0 = {
+ .id = 512,
+ .name = "slv-ebi-ch0",
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node *msm8916_bimc_nodes[] = {
+ [SNOC_BIMC_0_SLV] = &snoc_bimc_0_slv,
+ [SLV_EBI_CH0] = &slv_ebi_ch0,
+};
+
+static struct qcom_interconnect_desc msm8916_bimc = {
+ .nodes = msm8916_bimc_nodes,
+ .num_nodes = ARRAY_SIZE(msm8916_bimc_nodes),
+};
+
+static struct qcom_interconnect_node pnoc_int_1 = {
+ .id = 10013,
+ .name = "pnoc-int-1",
+ .links = { &pnoc_snoc_mas.node },
+ .num_links = 1,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node mas_pnoc_sdcc_1 = {
+ .id = 78,
+ .name = "mas-pnoc-sdcc-1",
+ .links = { &pnoc_int_1.node },
+ .num_links = 1,
+ .port = 7,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node mas_pnoc_sdcc_2 = {
+ .id = 81,
+ .name = "mas-pnoc-sdcc-2",
+ .links = { &pnoc_int_1.node },
+ .num_links = 1,
+ .port = 8,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node pnoc_snoc_mas = {
+ .id = 10010,
+ .name = "pnoc-snoc-mas",
+ .links = { &pnoc_snoc_slv.node },
+ .num_links = 1,
+ .buswidth = 8,
+};
+
+static struct qcom_interconnect_node *msm8916_pnoc_nodes[] = {
+ [PNOC_INT_1] = &pnoc_int_1,
+ [MAS_PNOC_SDCC_1] = &mas_pnoc_sdcc_1,
+ [MAS_PNOC_SDCC_2] = &mas_pnoc_sdcc_2,
+ [PNOC_SNOC_MAS] = &pnoc_snoc_mas,
+};
+
+static struct qcom_interconnect_desc msm8916_pnoc = {
+ .nodes = msm8916_pnoc_nodes,
+ .num_nodes = ARRAY_SIZE(msm8916_pnoc_nodes),
+};
+
+static int qcom_interconnect_init(struct interconnect_node *node)
+{
+ struct qcom_interconnect_node *qn = to_qcom_node(node);
+
+ /* populate default values */
+ if (!qn->buswidth)
+ qn->buswidth = 8;
+
+ /* TODO: init qos and priority */
+
+ return 0;
+}
+
+static int qcom_interconnect_set(struct interconnect_node *src,
+ struct interconnect_node *dst,
+ struct interconnect_creq *creq)
+{
+ struct qcom_interconnect_provider *qicp;
+ struct qcom_interconnect_node *qn;
+ struct interconnect_node *node;
+ struct icp *icp;
+ u64 rate = 0;
+ int ret = 0;
+
+ if (!src && !dst)
+ return -ENODEV;
+
+ if (!src)
+ node = dst;
+ else
+ node = src;
+
+ qn = to_qcom_node(node);
+ icp = qn->node.icp;
+ qicp = to_qcom_icp(node->icp);
+
+ rate = max(icp->creq.avg_bw, icp->creq.peak_bw);
+
+ do_div(rate, qn->buswidth);
+
+ if (qn->rate != rate) {
+ ret = clk_set_rate(qicp->bus_clk, rate);
+ if (ret) {
+ pr_err("set clk rate %lld error %d\n", rate, ret);
+ return ret;
+ }
+
+ ret = clk_set_rate(qicp->bus_a_clk, rate);
+ if (ret) {
+ pr_err("set clk rate %lld error %d\n", rate, ret);
+ return ret;
+ }
+
+ qn->rate = rate;
+ }
+
+ return ret;
+}
+
+struct interconnect_onecell_data {
+ struct interconnect_node **nodes;
+ unsigned int num_nodes;
+};
+
+static const struct icp_ops qcom_ops = {
+ .set = qcom_interconnect_set,
+};
+
+static int qnoc_probe(struct platform_device *pdev)
+{
+ struct qcom_interconnect_provider *qicp;
+ struct icp *icp;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ struct resource *res;
+ void __iomem *base;
+ struct clk *bus_clk, *bus_a_clk;
+ size_t num_nodes, i;
+ const struct qcom_interconnect_desc *desc;
+ struct qcom_interconnect_node **qnodes;
+ u32 type, base_offset, qos_offset;
+
+ desc = of_device_get_match_data(&pdev->dev);
+ if (!desc)
+ return -EINVAL;
+
+ qnodes = desc->nodes;
+ num_nodes = desc->num_nodes;
+
+ qicp = devm_kzalloc(dev, sizeof(*qicp), GFP_KERNEL);
+ if (!qicp)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ bus_clk = devm_clk_get(&pdev->dev, "bus_clk");
+ if (IS_ERR(bus_clk))
+ return PTR_ERR(bus_clk);
+ bus_a_clk = devm_clk_get(&pdev->dev, "bus_a_clk");
+ if (IS_ERR(bus_a_clk))
+ return PTR_ERR(bus_a_clk);
+
+ of_property_read_u32(np, "type", &type);
+ of_property_read_u32(np, "base-offset", &base_offset);
+ of_property_read_u32(np, "qos-offset", &qos_offset);
+
+ qicp->base = base;
+ qicp->type = type;
+ qicp->base_offset = base_offset;
+ qicp->qos_offset = qos_offset;
+ qicp->bus_clk = bus_clk;
+ qicp->bus_a_clk = bus_a_clk;
+ icp = &qicp->icp;
+ icp->dev = dev;
+ icp->ops = &qcom_ops;
+ INIT_LIST_HEAD(&icp->nodes);
+
+ for (i = 0; i < num_nodes; i++) {
+ struct interconnect_node *node;
+ int ret;
+ size_t j;
+
+ if (!qnodes[i])
+ continue;
+
+ node = &qnodes[i]->node;
+ node->dev_id = kstrdup_const(qnodes[i]->name, GFP_KERNEL);
+ node->con_id = qnodes[i]->id;
+ node->icp = icp;
+ node->num_links = qnodes[i]->num_links;
+ node->links = devm_kcalloc(dev, node->num_links,
+ sizeof(*node->links), GFP_KERNEL);
+ if (!node->links)
+ return -ENOMEM;
+
+ /* populate links */
+ for (j = 0; j < node->num_links; j++)
+ node->links[j] = qnodes[i]->links[j];
+
+ /* add the node to interconnect provider */
+ list_add_tail(&node->icn_list, &icp->nodes);
+ dev_dbg(&pdev->dev, "registered node %p %s %d\n", node,
+ node->dev_id, node->con_id);
+
+ ret = qcom_interconnect_init(node);
+ if (ret)
+ dev_err(&pdev->dev, "node init error (%d)\n", ret);
+ }
+
+ return interconnect_add_provider(icp);
+}
+
+static const struct of_device_id qnoc_of_match[] = {
+ { .compatible = "qcom,msm8916-pnoc", .data = &msm8916_pnoc },
+ { .compatible = "qcom,msm8916-snoc", .data = &msm8916_snoc },
+ { .compatible = "qcom,msm8916-bimc", .data = &msm8916_bimc },
+ { },
+};
+MODULE_DEVICE_TABLE(of, qnoc_of_match);
+
+static struct platform_driver qnoc_driver = {
+ .probe = qnoc_probe,
+ .driver = {
+ .name = "qnoc-msm8916",
+ .of_match_table = qnoc_of_match,
+ },
+};
+module_platform_driver(qnoc_driver);
+MODULE_AUTHOR("Georgi Djakov <georgi.djakov@linaro.org>");
+MODULE_DESCRIPTION("Qualcomm msm8916 NoC driver");
+MODULE_LICENSE("GPL v2");
diff --git a/include/linux/interconnect/qcom-msm8916.h b/include/linux/interconnect/qcom-msm8916.h
new file mode 100644
index 000000000000..355582a09bea
--- /dev/null
+++ b/include/linux/interconnect/qcom-msm8916.h
@@ -0,0 +1,92 @@
+#ifndef __LINUX_INTERCONNECT_QCOM_NOC_H
+#define __LINUX_INTERCONNECT_QCOM_NOC_H
+
+#define MAS_VIDEO 0
+#define MAS_JPEG 1
+#define MAS_VFE 2
+#define MAS_MDP 3
+#define MAS_QDSS_BAM 4
+#define MAS_SNOC_CFG 5
+#define MAS_QDSS_ETR 6
+#define MM_INT_0 7
+#define MM_INT_1 8
+#define MM_INT_2 9
+#define MM_INT_BIMC 10
+#define SNOC_INT_0 11
+#define SNOC_INT_1 12
+#define SNOC_INT_BIMC 13
+#define SNOC_BIMC_0_MAS 14
+#define SNOC_BIMC_1_MAS 15
+#define QDSS_INT 16
+#define BIMC_SNOC_SLV 17
+#define SNOC_PNOC_MAS 18
+#define PNOC_SNOC_SLV 19
+#define SLV_SRVC_SNOC 20
+#define SLV_QDSS_STM 21
+#define SLV_IMEM 22
+#define SLV_APSS 23
+#define SLV_CATS_0 24
+#define SLV_CATS_1 25
+
+#define MAS_APPS 0
+#define MAS_TCU0 1
+#define MAS_TCU1 2
+#define MAS_GFX 3
+#define BIMC_SNOC_MAS 4
+#define SNOC_BIMC_0_SLV 5
+#define SNOC_BIMC_1_SLV 6
+#define SLV_EBI_CH0 7
+#define SLV_APPS_L2 8
+
+#define SNOC_PNOC_SLV 0
+#define PNOC_INT_0 1
+#define PNOC_INT_1 2
+#define PNOC_M_0 3
+#define PNOC_M_1 4
+#define PNOC_S_0 5
+#define PNOC_S_1 6
+#define PNOC_S_2 7
+#define PNOC_S_3 8
+#define PNOC_S_4 9
+#define PNOC_S_8 10
+#define PNOC_S_9 11
+#define SLV_IMEM_CFG 12
+#define SLV_CRYPTO_0_CFG 13
+#define SLV_MSG_RAM 14
+#define SLV_PDM 15
+#define SLV_PRNG 16
+#define SLV_CLK_CTL 17
+#define SLV_MSS 18
+#define SLV_TLMM 19
+#define SLV_TCSR 20
+#define SLV_SECURITY 21
+#define SLV_SPDM 22
+#define SLV_PNOC_CFG 23
+#define SLV_PMIC_ARB 24
+#define SLV_BIMC_CFG 25
+#define SLV_BOOT_ROM 26
+#define SLV_MPM 27
+#define SLV_QDSS_CFG 28
+#define SLV_RBCPR_CFG 29
+#define SLV_SNOC_CFG 30
+#define SLV_DEHR_CFG 31
+#define SLV_VENUS_CFG 32
+#define SLV_DISPLAY_CFG 33
+#define SLV_CAMERA_CFG 34
+#define SLV_USB_HS 35
+#define SLV_SDCC_1 36
+#define SLV_BLSP_1 37
+#define SLV_SDCC_2 38
+#define SLV_GFX_CFG 39
+#define SLV_AUDIO 40
+#define MAS_BLSP_1 41
+#define MAS_SPDM 42
+#define MAS_DEHR 43
+#define MAS_AUDIO 44
+#define MAS_USB_HS 45
+#define MAS_PNOC_CRYPTO_0 46
+#define MAS_PNOC_SDCC_1 47
+#define MAS_PNOC_SDCC_2 48
+#define PNOC_SNOC_MAS 49
+
+#endif
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| From | Georgi Djakov <georgi.djakov@linaro.org> |
|---|---|
| Date | 2017-09-08 19:20 +0200 |
| Subject | [RFC v3 2/3] interconnect: Add basic event tracing |
| Message-ID | <unv6H-1yj-31@gated-at.bofh.it> |
| In reply to | #1729096 |
Add basic tracepoints in interconnect_set() so we can trace the
performance and the operations which configure the hardware.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Ingo Molnar <mingo@redhat.com>
---
drivers/interconnect/interconnect.c | 7 ++++++
include/trace/events/interconnect.h | 45 +++++++++++++++++++++++++++++++++++++
2 files changed, 52 insertions(+)
create mode 100644 include/trace/events/interconnect.h
diff --git a/drivers/interconnect/interconnect.c b/drivers/interconnect/interconnect.c
index 94e2a9f01545..4a016f3bedc3 100644
--- a/drivers/interconnect/interconnect.c
+++ b/drivers/interconnect/interconnect.c
@@ -33,6 +33,9 @@ struct interconnect_path {
struct interconnect_req reqs[0];
};
+#define CREATE_TRACE_POINTS
+#include <trace/events/interconnect.h>
+
static struct interconnect_node *node_find(const char *dev_id, int con_id)
{
struct interconnect_node *node = ERR_PTR(-EPROBE_DEFER);
@@ -209,6 +212,8 @@ int interconnect_set(struct interconnect_path *path,
size_t i;
int ret = 0;
+ trace_interconnect_set(path);
+
for (i = 0; i < path->num_nodes; i++, prev = next) {
next = path->reqs[i].node;
@@ -242,6 +247,8 @@ int interconnect_set(struct interconnect_path *path,
}
out:
+ trace_interconnect_set_complete(path);
+
return ret;
}
diff --git a/include/trace/events/interconnect.h b/include/trace/events/interconnect.h
new file mode 100644
index 000000000000..c4a72163873c
--- /dev/null
+++ b/include/trace/events/interconnect.h
@@ -0,0 +1,45 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM interconnect
+
+#if !defined(_TRACE_INTERCONNECT_H) || defined(TRACE_HEADER_MULTI_READ)
+#define _TRACE_INTERCONNECT_H
+
+#include <linux/tracepoint.h>
+
+struct interconnect_path;
+
+DECLARE_EVENT_CLASS(interconnect_path,
+
+ TP_PROTO(struct interconnect_path *path),
+
+ TP_ARGS(path),
+
+ TP_STRUCT__entry(
+ __field(struct interconnect_path *, path)
+ ),
+
+ TP_fast_assign(
+ __entry->path = path;
+ ),
+
+ TP_printk("INTERCONNECT: %p", __entry->path)
+);
+
+DEFINE_EVENT(interconnect_path, interconnect_set,
+
+ TP_PROTO(struct interconnect_path *path),
+
+ TP_ARGS(path)
+);
+
+DEFINE_EVENT(interconnect_path, interconnect_set_complete,
+
+ TP_PROTO(struct interconnect_path *path),
+
+ TP_ARGS(path)
+);
+
+#endif /* _TRACE_INTERCONNECT_H */
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
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| From | Steven Rostedt <rostedt@goodmis.org> |
|---|---|
| Date | 2017-09-08 20:20 +0200 |
| Subject | Re: [RFC v3 2/3] interconnect: Add basic event tracing |
| Message-ID | <unw2L-283-37@gated-at.bofh.it> |
| In reply to | #1729105 |
On Fri, 8 Sep 2017 20:18:29 +0300
Georgi Djakov <georgi.djakov@linaro.org> wrote:
> diff --git a/include/trace/events/interconnect.h b/include/trace/events/interconnect.h
> new file mode 100644
> index 000000000000..c4a72163873c
> --- /dev/null
> +++ b/include/trace/events/interconnect.h
> @@ -0,0 +1,45 @@
> +#undef TRACE_SYSTEM
> +#define TRACE_SYSTEM interconnect
> +
> +#if !defined(_TRACE_INTERCONNECT_H) || defined(TRACE_HEADER_MULTI_READ)
> +#define _TRACE_INTERCONNECT_H
> +
> +#include <linux/tracepoint.h>
> +
> +struct interconnect_path;
> +
> +DECLARE_EVENT_CLASS(interconnect_path,
> +
> + TP_PROTO(struct interconnect_path *path),
> +
> + TP_ARGS(path),
> +
> + TP_STRUCT__entry(
> + __field(struct interconnect_path *, path)
> + ),
> +
> + TP_fast_assign(
> + __entry->path = path;
> + ),
> +
> + TP_printk("INTERCONNECT: %p", __entry->path)
You're passing in an interconnect_path and only recording the pointer
to it? Wouldn't it be useful to record other aspects? Like the number
of nodes, the avg and peak bw of each node?
-- Steve
> +);
> +
> +DEFINE_EVENT(interconnect_path, interconnect_set,
> +
> + TP_PROTO(struct interconnect_path *path),
> +
> + TP_ARGS(path)
> +);
> +
> +DEFINE_EVENT(interconnect_path, interconnect_set_complete,
> +
> + TP_PROTO(struct interconnect_path *path),
> +
> + TP_ARGS(path)
> +);
> +
> +#endif /* _TRACE_INTERCONNECT_H */
> +
> +/* This part must be outside protection */
> +#include <trace/define_trace.h>
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| From | Georgi Djakov <georgi.djakov@linaro.org> |
|---|---|
| Date | 2017-09-08 22:20 +0200 |
| Subject | Re: [RFC v3 2/3] interconnect: Add basic event tracing |
| Message-ID | <unxUS-3wr-33@gated-at.bofh.it> |
| In reply to | #1729176 |
On 8.09.17 г. 21:13, Steven Rostedt wrote:
> On Fri, 8 Sep 2017 20:18:29 +0300
> Georgi Djakov <georgi.djakov@linaro.org> wrote:
>
>> diff --git a/include/trace/events/interconnect.h b/include/trace/events/interconnect.h
>> new file mode 100644
>> index 000000000000..c4a72163873c
>> --- /dev/null
>> +++ b/include/trace/events/interconnect.h
>> @@ -0,0 +1,45 @@
>> +#undef TRACE_SYSTEM
>> +#define TRACE_SYSTEM interconnect
>> +
>> +#if !defined(_TRACE_INTERCONNECT_H) || defined(TRACE_HEADER_MULTI_READ)
>> +#define _TRACE_INTERCONNECT_H
>> +
>> +#include <linux/tracepoint.h>
>> +
>> +struct interconnect_path;
>> +
>> +DECLARE_EVENT_CLASS(interconnect_path,
>> +
>> + TP_PROTO(struct interconnect_path *path),
>> +
>> + TP_ARGS(path),
>> +
>> + TP_STRUCT__entry(
>> + __field(struct interconnect_path *, path)
>> + ),
>> +
>> + TP_fast_assign(
>> + __entry->path = path;
>> + ),
>> +
>> + TP_printk("INTERCONNECT: %p", __entry->path)
>
> You're passing in an interconnect_path and only recording the pointer
> to it? Wouldn't it be useful to record other aspects? Like the number
> of nodes, the avg and peak bw of each node?
>
My goal was to get just the path with some timestamps, but your suggestion
sounds good. Will do it. Thanks!
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