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Re: [PATCH v2 0/8] MT2712 IOMMU SUPPORT

Started byYong Wu <yong.wu@mediatek.com>
First post2017-09-06 07:50 +0200
Last post2017-09-06 07:50 +0200
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  Re: [PATCH v2 0/8] MT2712 IOMMU SUPPORT Yong Wu <yong.wu@mediatek.com> - 2017-09-06 07:50 +0200

#1727165 — Re: [PATCH v2 0/8] MT2712 IOMMU SUPPORT

FromYong Wu <yong.wu@mediatek.com>
Date2017-09-06 07:50 +0200
SubjectRe: [PATCH v2 0/8] MT2712 IOMMU SUPPORT
Message-ID<umBnP-5iy-5@gated-at.bofh.it>
On Tue, 2017-08-22 at 22:38 +0800, Joerg Roedel wrote:
> On Mon, Aug 21, 2017 at 07:00:13PM +0800, Yong Wu wrote:
> > Yong Wu (8):
> >   dt-bindings: mediatek: Add binding for mt2712 IOMMU and SMI
> >   iommu/mediatek: Move MTK_M4U_TO_LARB/PORT into mtk_iommu.c
> >   iommu/mediatek: Add mt2712 IOMMU support
> >   iommu/mediatek: Merge 2 M4U HWs into one iommu domain
> >   iommu/mediatek: Move pgtable allocation into domain_alloc
> >   iommu/mediatek: Disable iommu clock when system suspend
> >   iommu/mediatek: Enlarge the validate PA range for 4GB mode
> >   memory: mtk-smi: Degrade SMI init to module_init
> 
> Applied patches 2-7. Patch 1 is something for Matthias.

Hi Matthias,

   Could you help review the patch[1/8]? If it's ok for you too,Could
you help apply that one via your tree.
   Thanks.

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