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[PATCH v1 3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock

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  [PATCH v1 3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock Elaine Zhang <zhangqing@rock-chips.com> - 2017-09-01 04:10 +0200

#1724738 — [PATCH v1 3/3] clk: rockchip: rk3126: add sclk_timer5 as critical clock

sclk_timer5 is for arm arch counter, so need always on.
but no dts node to handle this clk, so make it as critical clock

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---
 drivers/clk/rockchip/clk-rk3128.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c
index ce02d2cff608..5970a50671b9 100644
--- a/drivers/clk/rockchip/clk-rk3128.c
+++ b/drivers/clk/rockchip/clk-rk3128.c
@@ -578,6 +578,7 @@ enum rk3128_plls {
 	"hclk_peri",
 	"pclk_peri",
 	"pclk_pmu",
+	"sclk_timer5",
 };
 
 static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)
-- 
1.9.1

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