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[PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

Started byPhilipp Rossak <embed3d@gmail.com>
First post2017-08-30 05:10 +0200
Last post2017-09-01 15:10 +0200
Articles 4 — 2 participants

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  [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus Philipp Rossak <embed3d@gmail.com> - 2017-08-30 05:10 +0200
    Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on  Nanopi M1 Plus Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-08-30 17:00 +0200
      Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on  Nanopi M1 Plus Philipp Rossak <embed3d@gmail.com> - 2017-08-31 00:00 +0200
        Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on  Nanopi M1 Plus Maxime Ripard <maxime.ripard@free-electrons.com> - 2017-09-01 15:10 +0200

#1722993 — [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

FromPhilipp Rossak <embed3d@gmail.com>
Date2017-08-30 05:10 +0200
Subject[PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus
Message-ID<uk1ya-2Ub-19@gated-at.bofh.it>
From: Philipp Rossak <embed3d@gmail.com>

The WiFi side of the AP6212 WiFi/BT combo module is connected to
mmc1. There are also GPIOs for enable and interrupts.

Enable WiFi on this board by enabling mmc1 and adding the power
sequencing clocks and GPIO, as well as the chip's interrupt line.

Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 35 +++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index b9c6c27..3054308 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -48,6 +48,7 @@
 
 	aliases {
 		ethernet0 = &emac;
+		ethernet1 = &ap6212;
 	};
 
 	reg_gmac_3v3: gmac-3v3 {
@@ -59,6 +60,14 @@
 		enable-active-high;
 		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
 	};
+
+	wifi_pwrseq: wifi_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_en_npi_m1p>;
+		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+	};
+
 };
 
 &ehci1 {
@@ -93,6 +102,25 @@
 	};
 };
 
+&mmc1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&mmc1_pins_a>;
+	vmmc-supply = <&reg_vcc3v3>;
+	vqmmc-supply = <&reg_vcc3v3>;
+	mmc-pwrseq = <&wifi_pwrseq>;
+	bus-width = <4>;
+	non-removable;
+	status = "okay";
+
+	ap6212: sdio_wifi@1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&pio>;
+		interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+		interrupt-names = "host-wake";
+	};
+};
+
 &ohci1 {
 	status = "okay";
 };
@@ -100,3 +128,10 @@
 &ohci2 {
 	status = "okay";
 };
+
+&r_pio {
+	wifi_en_npi_m1p: wifi_en_pin {
+		pins = "PL7";
+		function = "gpio_out";
+	};
+};
-- 
2.7.4

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#1723414 — Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2017-08-30 17:00 +0200
SubjectRe: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus
Message-ID<ukcDf-19H-5@gated-at.bofh.it>
In reply to#1722993

[Multipart message — attachments visible in raw view] — view raw

Hi,

On Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak wrote:
> From: Philipp Rossak <embed3d@gmail.com>
> 
> The WiFi side of the AP6212 WiFi/BT combo module is connected to
> mmc1. There are also GPIOs for enable and interrupts.
> 
> Enable WiFi on this board by enabling mmc1 and adding the power
> sequencing clocks and GPIO, as well as the chip's interrupt line.
> 
> Signed-off-by: Philipp Rossak <embed3d@gmail.com>
> ---
>  arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 35 +++++++++++++++++++++++++++
>  1 file changed, 35 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> index b9c6c27..3054308 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
> @@ -48,6 +48,7 @@
>  
>  	aliases {
>  		ethernet0 = &emac;
> +		ethernet1 = &ap6212;
>  	};
>  
>  	reg_gmac_3v3: gmac-3v3 {
> @@ -59,6 +60,14 @@
>  		enable-active-high;
>  		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
>  	};
> +
> +	wifi_pwrseq: wifi_pwrseq {
> +		compatible = "mmc-pwrseq-simple";
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&wifi_en_npi_m1p>;

There's no need for pinctrl nodes when the pin is set to a GPIO.

> +		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
> +	};
> +
>  };
>  
>  &ehci1 {
> @@ -93,6 +102,25 @@
>  	};
>  };
>  
> +&mmc1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&mmc1_pins_a>;
> +	vmmc-supply = <&reg_vcc3v3>;
> +	vqmmc-supply = <&reg_vcc3v3>;

You don't need vqmmc in this case.

> +	mmc-pwrseq = <&wifi_pwrseq>;
> +	bus-width = <4>;
> +	non-removable;
> +	status = "okay";
> +
> +	ap6212: sdio_wifi@1 {

You're sure you need a label here?

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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#1723689 — Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

FromPhilipp Rossak <embed3d@gmail.com>
Date2017-08-31 00:00 +0200
SubjectRe: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus
Message-ID<ukjbI-5jw-7@gated-at.bofh.it>
In reply to#1723414
Hi,
thanks for the feedback I will rework the patch.
Should I also update the sun8i-h3-bananapi-m2-plus.dts? It uses also the 
AP6212 and it is done in the same way like in this patch.

Am 30.08.2017 um 16:52 schrieb Maxime Ripard:
> Hi,
> 
> On Wed, Aug 30, 2017 at 05:01:07AM +0200, Philipp Rossak wrote:
>> From: Philipp Rossak <embed3d@gmail.com>
>>
>> The WiFi side of the AP6212 WiFi/BT combo module is connected to
>> mmc1. There are also GPIOs for enable and interrupts.
>>
>> Enable WiFi on this board by enabling mmc1 and adding the power
>> sequencing clocks and GPIO, as well as the chip's interrupt line.
>>
>> Signed-off-by: Philipp Rossak <embed3d@gmail.com>
>> ---
>>   arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 35 +++++++++++++++++++++++++++
>>   1 file changed, 35 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
>> index b9c6c27..3054308 100644
>> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
>> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
>> @@ -48,6 +48,7 @@
>>   
>>   	aliases {
>>   		ethernet0 = &emac;
>> +		ethernet1 = &ap6212;
>>   	};
>>   
>>   	reg_gmac_3v3: gmac-3v3 {
>> @@ -59,6 +60,14 @@
>>   		enable-active-high;
>>   		gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
>>   	};
>> +
>> +	wifi_pwrseq: wifi_pwrseq {
>> +		compatible = "mmc-pwrseq-simple";
>> +		pinctrl-names = "default";
>> +		pinctrl-0 = <&wifi_en_npi_m1p>;
> 
> There's no need for pinctrl nodes when the pin is set to a GPIO.
> 
>> +		reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
>> +	};
>> +
>>   };
>>   
>>   &ehci1 {
>> @@ -93,6 +102,25 @@
>>   	};
>>   };
>>   
>> +&mmc1 {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&mmc1_pins_a>;
>> +	vmmc-supply = <&reg_vcc3v3>;
>> +	vqmmc-supply = <&reg_vcc3v3>;
> 
> You don't need vqmmc in this case.
> 
>> +	mmc-pwrseq = <&wifi_pwrseq>;
>> +	bus-width = <4>;
>> +	non-removable;
>> +	status = "okay";
>> +
>> +	ap6212: sdio_wifi@1 {
> 
> You're sure you need a label here?
> 
> Thanks!
> Maxime
>

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#1725036 — Re: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus

FromMaxime Ripard <maxime.ripard@free-electrons.com>
Date2017-09-01 15:10 +0200
SubjectRe: [PATCH 4/7] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus
Message-ID<ukTRU-5bk-25@gated-at.bofh.it>
In reply to#1723689

[Multipart message — attachments visible in raw view] — view raw

On Wed, Aug 30, 2017 at 11:51:37PM +0200, Philipp Rossak wrote:
> Hi,
> thanks for the feedback I will rework the patch.
> Should I also update the sun8i-h3-bananapi-m2-plus.dts? It uses also the
> AP6212 and it is done in the same way like in this patch.

Yes, please.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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