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[PATCH 0/2] fix 4GB DRAM window support on mvebu

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  [PATCH 0/2] fix 4GB DRAM window support on mvebu Jan Luebbe <jlu@pengutronix.de> - 2017-08-28 17:30 +0200
    [RFC] ARM: Orion: Check DRAM window size Jan Luebbe <jlu@pengutronix.de> - 2017-08-28 17:40 +0200
      Re: [RFC] ARM: Orion: Check DRAM window size Andrew Lunn <andrew@lunn.ch> - 2017-08-28 18:00 +0200
    Re: [PATCH 0/2] fix 4GB DRAM window support on mvebu Bjorn Helgaas <helgaas@kernel.org> - 2017-08-30 22:10 +0200
      Re: [PATCH 0/2] fix 4GB DRAM window support on mvebu Gregory CLEMENT <gregory.clement@free-electrons.com> - 2017-08-31 10:20 +0200

#1721753 — [PATCH 0/2] fix 4GB DRAM window support on mvebu

The current MBUS DRAM window calculation fails for 4GB windows because it
overflows. This is fixed in the first patch by using u64 instead of u32 to
store the size. The second excplicitly checks that we don't try to configure a
too large memory window in the pci driver.

As they don't depend on each other, they could also go in separatly.

Jan Luebbe (2):
  bus: mbus: fix window size calculation for 4GB windows
  PCI: mvebu: Check DRAM window size

 drivers/bus/mvebu-mbus.c     |  2 +-
 drivers/pci/host/pci-mvebu.c | 27 ++++++++++++++++++++++-----
 include/linux/mbus.h         |  4 ++--
 3 files changed, 25 insertions(+), 8 deletions(-)

-- 
2.11.0

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#1721754 — [RFC] ARM: Orion: Check DRAM window size

This is a corresponding change as "PCI: mvebu: Check DRAM window size" applied
to the Orion PCIe driver. I don't have the relevant hardware myself, but the
patch may still be useful for someone who has. This is completely untested.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
---
 arch/arm/mach-dove/pcie.c    |  3 ++-
 arch/arm/mach-mv78xx0/pcie.c |  3 ++-
 arch/arm/mach-orion5x/pci.c  |  3 ++-
 arch/arm/plat-orion/pcie.c   | 19 +++++++++++++++----
 4 files changed, 21 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 91fe97144570..27e4689ee58d 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -51,7 +51,8 @@ static int __init dove_pcie_setup(int nr, struct pci_sys_data *sys)
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
 
-	orion_pcie_setup(pp->base);
+	if (!orion_pcie_setup(pp->base))
+		return 0;
 
 	if (pp->index == 0)
 		pci_ioremap_io(sys->busnr * SZ_64K, DOVE_PCIE0_IO_PHYS_BASE);
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c
index 81ff4327a962..3d17eeff44bf 100644
--- a/arch/arm/mach-mv78xx0/pcie.c
+++ b/arch/arm/mach-mv78xx0/pcie.c
@@ -113,7 +113,8 @@ static int __init mv78xx0_pcie_setup(int nr, struct pci_sys_data *sys)
 	 * Generic PCIe unit setup.
 	 */
 	orion_pcie_set_local_bus_nr(pp->base, sys->busnr);
-	orion_pcie_setup(pp->base);
+	if (!orion_pcie_setup(pp->base))
+		return 0;
 
 	pci_ioremap_io(nr * SZ_64K, MV78XX0_PCIE_IO_PHYS_BASE(nr));
 
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index ecb998e7f8dc..f7f830872cc9 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -147,7 +147,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 	/*
 	 * Generic PCIe unit setup.
 	 */
-	orion_pcie_setup(PCIE_BASE);
+	if (!orion_pcie_setup(PCIE_BASE))
+		return 0;
 
 	/*
 	 * Check whether to apply Orion-1/Orion-NAS PCIe config
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index 8b8c06d2e9c4..07ae382cf48a 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -120,10 +120,10 @@ void __init orion_pcie_reset(void __iomem *base)
  * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks
  * WIN[0-3] -> DRAM bank[0-3]
  */
-static void __init orion_pcie_setup_wins(void __iomem *base)
+static int __init orion_pcie_setup_wins(void __iomem *base)
 {
 	const struct mbus_dram_target_info *dram;
-	u32 size;
+	u64 size;
 	int i;
 
 	dram = mv_mbus_dram_info();
@@ -170,15 +170,23 @@ static void __init orion_pcie_setup_wins(void __iomem *base)
 	if ((size & (size - 1)) != 0)
 		size = 1 << fls(size);
 
+	if (size > 0x100000000) {
+		pr_err("Could not configure DRAM window (too large): 0x%llx\n",
+		       size);
+		return 0;
+	}
+
 	/*
 	 * Setup BAR[1] to all DRAM banks.
 	 */
 	writel(dram->cs[0].base, base + PCIE_BAR_LO_OFF(1));
 	writel(0, base + PCIE_BAR_HI_OFF(1));
 	writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1));
+
+	return 1;
 }
 
-void __init orion_pcie_setup(void __iomem *base)
+int __init orion_pcie_setup(void __iomem *base)
 {
 	u16 cmd;
 	u32 mask;
@@ -186,7 +194,8 @@ void __init orion_pcie_setup(void __iomem *base)
 	/*
 	 * Point PCIe unit MBUS decode windows to DRAM space.
 	 */
-	orion_pcie_setup_wins(base);
+	if (!orion_pcie_setup_wins(base))
+		return 0;
 
 	/*
 	 * Master + slave enable.
@@ -203,6 +212,8 @@ void __init orion_pcie_setup(void __iomem *base)
 	mask = readl(base + PCIE_MASK_OFF);
 	mask |= 0x0f000000;
 	writel(mask, base + PCIE_MASK_OFF);
+
+	return 1;
 }
 
 int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
-- 
2.11.0

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#1721773 — Re: [RFC] ARM: Orion: Check DRAM window size

On Mon, Aug 28, 2017 at 05:30:39PM +0200, Jan Luebbe wrote:
> This is a corresponding change as "PCI: mvebu: Check DRAM window size" applied
> to the Orion PCIe driver. I don't have the relevant hardware myself, but the
> patch may still be useful for someone who has. This is completely untested.

Hi Jan

I've never seen one of these boards have more than 512M bytes of RAM.
So it is probably a non-issue.

   Andrew

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#1723631

On Mon, Aug 28, 2017 at 05:25:15PM +0200, Jan Luebbe wrote:
> The current MBUS DRAM window calculation fails for 4GB windows because it
> overflows. This is fixed in the first patch by using u64 instead of u32 to
> store the size. The second excplicitly checks that we don't try to configure a
> too large memory window in the pci driver.
> 
> As they don't depend on each other, they could also go in separatly.
> 
> Jan Luebbe (2):
>   bus: mbus: fix window size calculation for 4GB windows
>   PCI: mvebu: Check DRAM window size
> 
>  drivers/bus/mvebu-mbus.c     |  2 +-
>  drivers/pci/host/pci-mvebu.c | 27 ++++++++++++++++++++++-----
>  include/linux/mbus.h         |  4 ++--
>  3 files changed, 25 insertions(+), 8 deletions(-)

Since these can be applied separately, I'll let somebody else take care of
the drivers/bus/mvebu-mbus.c part.

I'll look for an ack from Thomas or Jason before applying the second patch,
which touches drivers/pci/host/pci-mvebu.c.

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#1723972

Hi Bjorn and Jan,
 
 On mer., août 30 2017, Bjorn Helgaas <helgaas@kernel.org> wrote:

> On Mon, Aug 28, 2017 at 05:25:15PM +0200, Jan Luebbe wrote:
>> The current MBUS DRAM window calculation fails for 4GB windows because it
>> overflows. This is fixed in the first patch by using u64 instead of u32 to
>> store the size. The second excplicitly checks that we don't try to configure a
>> too large memory window in the pci driver.
>> 
>> As they don't depend on each other, they could also go in separatly.
>> 
>> Jan Luebbe (2):
>>   bus: mbus: fix window size calculation for 4GB windows
>>   PCI: mvebu: Check DRAM window size
>> 
>>  drivers/bus/mvebu-mbus.c     |  2 +-
>>  drivers/pci/host/pci-mvebu.c | 27 ++++++++++++++++++++++-----
>>  include/linux/mbus.h         |  4 ++--
>>  3 files changed, 25 insertions(+), 8 deletions(-)
>
> Since these can be applied separately, I'll let somebody else take care of
> the drivers/bus/mvebu-mbus.c part.

I think I am the one who should take it. I will apply it when v4.14-rc1
will be released as it is too late for me for 4.14 now.

However I am not against the fact that it is applied through an other
tree because we don't touch this file for the next release so there is
no risk for a conflict, I can give my Acked-by if needed.

Thanks,

Gregory

>
> I'll look for an ack from Thomas or Jason before applying the second patch,
> which touches drivers/pci/host/pci-mvebu.c.

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

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