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Groups > linux.kernel > #1721721 > unrolled thread
| Started by | Antoine Tenart <antoine.tenart@free-electrons.com> |
|---|---|
| First post | 2017-08-28 17:10 +0200 |
| Last post | 2017-08-28 17:10 +0200 |
| Articles | 4 — 1 participant |
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[PATCH net-next v3 00/13] net: mvpp2: comphy configuration Antoine Tenart <antoine.tenart@free-electrons.com> - 2017-08-28 17:10 +0200
[PATCH net-next v3 07/13] net: mvpp2: do not set GMAC autoneg when using XLG MAC Antoine Tenart <antoine.tenart@free-electrons.com> - 2017-08-28 17:10 +0200
[PATCH net-next v3 13/13] arm64: defconfig: enable Marvell CP110 comphy Antoine Tenart <antoine.tenart@free-electrons.com> - 2017-08-28 17:10 +0200
[PATCH net-next v3 08/13] net: mvpp2: dynamic reconfiguration of the comphy/GoP/MAC Antoine Tenart <antoine.tenart@free-electrons.com> - 2017-08-28 17:10 +0200
| From | Antoine Tenart <antoine.tenart@free-electrons.com> |
|---|---|
| Date | 2017-08-28 17:10 +0200 |
| Subject | [PATCH net-next v3 00/13] net: mvpp2: comphy configuration |
| Message-ID | <ujtGa-6PN-15@gated-at.bofh.it> |
Hi all,
This series, following up the one one the GoP/MAC configuration, aims at
stopping to depend on the firmware/bootloader configuration when using
the PPv2 engine. With this series the PPv2 driver does not need to rely
on a previous configuration, and dynamic reconfiguration while the
kernel is running can be done (i.e. switch one port from SGMII to 10G,
or the opposite). A port can now be configured in a different mode than
what's done in the firmware/bootloader as well.
The series first contain patches in the generic PHY framework to support
what is called the comphy (common PHYs), which is an h/w block providing
PHYs that can be configured in various modes ranging from SGMII, 10G
to SATA and others. As of now only the SGMII and 10G modes are
supported by the comphy driver.
Then patches are modifying the PPv2 driver to first add the comphy
initialization sequence (i.e. calls to the generic PHY framework) and to
then take advantage of this to allow dynamic reconfiguration (i.e.
configuring the mode of a port given what's connected, between sgmii and
10G). Note the use of the comphy in the PPv2 driver is kept optional
(i.e. if not described in dt the driver still as before an relies on the
firmware/bootloader configuration).
Finally there are dt/defconfig patches to describe and take advantage of
this.
This was tested on a range of devices: 8040-db, 8040-mcbin and 7040-db.
Thanks!
Antoine
Since v2:
- Kept the link mode enforcement.
- Removed the netif_running() check.
- Reworded the "dynamic reconfiguration of the PHY mode" commit log.
- Added one patch not to force the GMAC autoneg parameters when using
the XLG MAC.
Since v1:
- Updated the mode settings variable name in the comphy driver to
have 'cp110' in it.
- Documented the PHY cell argument in the dt documentation.
- New patch adding comphy phandles for the 7040-db board.
- Checked if the carrier_on/off functions were needed. They are.
- s/PHY/generic PHY/ in commit log of patch 1.
- Rebased on the latest net-next/master.
Antoine Tenart (12):
phy: add sgmii and 10gkr modes to the phy_mode enum
phy: add the mvebu cp110 comphy driver
Documentation/bindings: phy: document the Marvell comphy driver
net: mvpp2: initialize the comphy
net: mvpp2: simplify the link_event function
net: mvpp2: improve the link management function
net: mvpp2: do not set GMAC autoneg when using XLG MAC
net: mvpp2: dynamic reconfiguration of the comphy/GoP/MAC
arm64: dts: marvell: extend the cp110 syscon register area length
arm64: dts: marvell: add comphy nodes on cp110 master and slave
arm64: dts: marvell: mcbin: add comphy references to Ethernet ports
arm64: dts: marvell: 7040-db: add comphy references to Ethernet ports
Miquel Raynal (1):
arm64: defconfig: enable Marvell CP110 comphy
.../devicetree/bindings/phy/phy-mvebu-comphy.txt | 43 ++
arch/arm64/boot/dts/marvell/armada-7040-db.dts | 1 +
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 3 +
.../boot/dts/marvell/armada-cp110-master.dtsi | 40 +-
.../arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 40 +-
arch/arm64/configs/defconfig | 1 +
drivers/net/ethernet/marvell/mvpp2.c | 153 +++--
drivers/phy/marvell/Kconfig | 10 +
drivers/phy/marvell/Makefile | 1 +
drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 656 +++++++++++++++++++++
include/linux/phy/phy.h | 2 +
11 files changed, 915 insertions(+), 35 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/phy-mvebu-comphy.txt
create mode 100644 drivers/phy/marvell/phy-mvebu-cp110-comphy.c
--
2.13.5
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| From | Antoine Tenart <antoine.tenart@free-electrons.com> |
|---|---|
| Date | 2017-08-28 17:10 +0200 |
| Subject | [PATCH net-next v3 07/13] net: mvpp2: do not set GMAC autoneg when using XLG MAC |
| Message-ID | <ujtPR-78t-45@gated-at.bofh.it> |
| In reply to | #1721721 |
When using the XLG MAC, it does not make sense to force the GMAC autoneg
parameters. This patch adds checks to only set the GMAC autoneg
parameters when needed (i.e. when not using the XLG MAC).
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 64 +++++++++++++++++++++++-------------
1 file changed, 42 insertions(+), 22 deletions(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c b/drivers/net/ethernet/marvell/mvpp2.c
index 09cad32734f3..2f05a0b0773c 100644
--- a/drivers/net/ethernet/marvell/mvpp2.c
+++ b/drivers/net/ethernet/marvell/mvpp2.c
@@ -5735,6 +5735,37 @@ static irqreturn_t mvpp2_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
+static void mvpp2_gmac_set_autoneg(struct mvpp2_port *port,
+ struct phy_device *phydev)
+{
+ u32 val;
+
+ if (port->phy_interface != PHY_INTERFACE_MODE_RGMII &&
+ port->phy_interface != PHY_INTERFACE_MODE_RGMII_ID &&
+ port->phy_interface != PHY_INTERFACE_MODE_RGMII_RXID &&
+ port->phy_interface != PHY_INTERFACE_MODE_RGMII_TXID &&
+ port->phy_interface != PHY_INTERFACE_MODE_SGMII)
+ return;
+
+ val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+ val &= ~(MVPP2_GMAC_CONFIG_MII_SPEED |
+ MVPP2_GMAC_CONFIG_GMII_SPEED |
+ MVPP2_GMAC_CONFIG_FULL_DUPLEX |
+ MVPP2_GMAC_AN_SPEED_EN |
+ MVPP2_GMAC_AN_DUPLEX_EN);
+
+ if (phydev->duplex)
+ val |= MVPP2_GMAC_CONFIG_FULL_DUPLEX;
+
+ if (phydev->speed == SPEED_1000)
+ val |= MVPP2_GMAC_CONFIG_GMII_SPEED;
+ else if (phydev->speed == SPEED_100)
+ val |= MVPP2_GMAC_CONFIG_MII_SPEED;
+
+ writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+
+}
+
/* Adjust link */
static void mvpp2_link_event(struct net_device *dev)
{
@@ -5745,24 +5776,7 @@ static void mvpp2_link_event(struct net_device *dev)
if (phydev->link) {
if ((port->speed != phydev->speed) ||
(port->duplex != phydev->duplex)) {
- u32 val;
-
- val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
- val &= ~(MVPP2_GMAC_CONFIG_MII_SPEED |
- MVPP2_GMAC_CONFIG_GMII_SPEED |
- MVPP2_GMAC_CONFIG_FULL_DUPLEX |
- MVPP2_GMAC_AN_SPEED_EN |
- MVPP2_GMAC_AN_DUPLEX_EN);
-
- if (phydev->duplex)
- val |= MVPP2_GMAC_CONFIG_FULL_DUPLEX;
-
- if (phydev->speed == SPEED_1000)
- val |= MVPP2_GMAC_CONFIG_GMII_SPEED;
- else if (phydev->speed == SPEED_100)
- val |= MVPP2_GMAC_CONFIG_MII_SPEED;
-
- writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+ mvpp2_gmac_set_autoneg(port, phydev);
port->duplex = phydev->duplex;
port->speed = phydev->speed;
@@ -5773,10 +5787,16 @@ static void mvpp2_link_event(struct net_device *dev)
port->link = phydev->link;
if (phydev->link) {
- val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
- val |= (MVPP2_GMAC_FORCE_LINK_PASS |
- MVPP2_GMAC_FORCE_LINK_DOWN);
- writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+ if (port->phy_interface == PHY_INTERFACE_MODE_RGMII ||
+ port->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
+ port->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||
+ port->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID ||
+ port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
+ val = readl(port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+ val |= (MVPP2_GMAC_FORCE_LINK_PASS |
+ MVPP2_GMAC_FORCE_LINK_DOWN);
+ writel(val, port->base + MVPP2_GMAC_AUTONEG_CONFIG);
+ }
mvpp2_interrupts_enable(port);
mvpp2_port_enable(port);
--
2.13.5
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| From | Antoine Tenart <antoine.tenart@free-electrons.com> |
|---|---|
| Date | 2017-08-28 17:10 +0200 |
| Subject | [PATCH net-next v3 13/13] arm64: defconfig: enable Marvell CP110 comphy |
| Message-ID | <ujtPR-78t-41@gated-at.bofh.it> |
| In reply to | #1721721 |
From: Miquel Raynal <miquel.raynal@free-electrons.com> The comphy is an hardware block giving access to common PHYs that can be used by various other engines (Network, SATA, ...). This is used on Marvell 7k/8k platforms for now. Enable the corresponding driver. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6b26a05ae5b4..d453ba50df43 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -510,6 +510,7 @@ CONFIG_PWM_TEGRA=m CONFIG_PHY_RCAR_GEN3_USB2=y CONFIG_PHY_HI6220_USB=y CONFIG_PHY_SUN4I_USB=y +CONFIG_PHY_MVEBU_CP110_COMPHY=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_EMMC=y CONFIG_PHY_ROCKCHIP_PCIE=m -- 2.13.5
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| From | Antoine Tenart <antoine.tenart@free-electrons.com> |
|---|---|
| Date | 2017-08-28 17:10 +0200 |
| Subject | [PATCH net-next v3 08/13] net: mvpp2: dynamic reconfiguration of the comphy/GoP/MAC |
| Message-ID | <ujtPS-78t-53@gated-at.bofh.it> |
| In reply to | #1721721 |
This patch adds logic to reconfigure the comphy/GoP/MAC when the link
state is updated at runtime. This is very useful on boards where many
link speed are supported: depending on what is negotiated the PPv2
driver will automatically reconfigures the link between the PHY and the
MAC.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
---
drivers/net/ethernet/marvell/mvpp2.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/marvell/mvpp2.c b/drivers/net/ethernet/marvell/mvpp2.c
index 2f05a0b0773c..9e64b1ba3d43 100644
--- a/drivers/net/ethernet/marvell/mvpp2.c
+++ b/drivers/net/ethernet/marvell/mvpp2.c
@@ -5771,9 +5771,28 @@ static void mvpp2_link_event(struct net_device *dev)
{
struct mvpp2_port *port = netdev_priv(dev);
struct phy_device *phydev = dev->phydev;
+ bool link_reconfigured = false;
u32 val;
if (phydev->link) {
+ if (port->phy_interface != phydev->interface && port->comphy) {
+ /* disable current port for reconfiguration */
+ mvpp2_interrupts_disable(port);
+ netif_carrier_off(port->dev);
+ mvpp2_port_disable(port);
+ phy_power_off(port->comphy);
+
+ /* comphy reconfiguration */
+ port->phy_interface = phydev->interface;
+ mvpp22_comphy_init(port);
+
+ /* gop/mac reconfiguration */
+ mvpp22_gop_init(port);
+ mvpp2_port_mii_set(port);
+
+ link_reconfigured = true;
+ }
+
if ((port->speed != phydev->speed) ||
(port->duplex != phydev->duplex)) {
mvpp2_gmac_set_autoneg(port, phydev);
@@ -5783,7 +5802,7 @@ static void mvpp2_link_event(struct net_device *dev)
}
}
- if (phydev->link != port->link) {
+ if (phydev->link != port->link || link_reconfigured) {
port->link = phydev->link;
if (phydev->link) {
--
2.13.5
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