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Groups > linux.kernel > #1722277 > unrolled thread

[PATCH 1/9] dt-bindings: timer: Add nxp tpm timer binding doc

Started byDaniel Lezcano <daniel.lezcano@linaro.org>
First post2017-08-29 11:40 +0200
Last post2017-08-29 11:40 +0200
Articles 11 — 2 participants

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  [PATCH 1/9] dt-bindings: timer: Add nxp tpm timer binding doc Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 11:40 +0200
    [PATCH 3/9] devicetree: bindings: Remove sh7372 CMT binding Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 11:40 +0200
    [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 11:40 +0200
      Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory  allocation failure SF Markus Elfring <elfring@users.sourceforge.net> - 2017-08-29 13:30 +0200
        Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory  allocation failure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 13:50 +0200
          Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory  allocation failure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 15:20 +0200
            Re: clocksource/drivers/bcm2835: Remove message on memory allocation  failure SF Markus Elfring <elfring@users.sourceforge.net> - 2017-08-29 15:30 +0200
              Re: clocksource/drivers/bcm2835: Remove message on memory allocation  failure Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 15:30 +0200
          Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory  allocation failure SF Markus Elfring <elfring@users.sourceforge.net> - 2017-08-29 15:20 +0200
    [PATCH 2/9] clocksource/drivers/imx-tpm: Add imx tpm timer support Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 11:40 +0200
    [PATCH 6/9] devicetree: bindings: Deprecate property, update example Daniel Lezcano <daniel.lezcano@linaro.org> - 2017-08-29 11:40 +0200

#1722277 — [PATCH 1/9] dt-bindings: timer: Add nxp tpm timer binding doc

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 11:40 +0200
Subject[PATCH 1/9] dt-bindings: timer: Add nxp tpm timer binding doc
Message-ID<ujLa1-T4-9@gated-at.bofh.it>
From: Dong Aisheng <aisheng.dong@nxp.com>

Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM)
binding doc.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Bai Ping <ping.bai@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 .../devicetree/bindings/timer/nxp,tpm-timer.txt    | 28 ++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
new file mode 100644
index 0000000..b4aa7dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
@@ -0,0 +1,28 @@
+NXP Low Power Timer/Pulse Width Modulation Module (TPM)
+
+The Timer/PWM Module (TPM) supports input capture, output compare,
+and the generation of PWM signals to control electric motor and power
+management applications. The counter, compare and capture registers
+are clocked by an asynchronous clock that can remain enabled in low
+power modes. TPM can support global counter bus where one TPM drives
+the counter bus for the others, provided bit width is the same.
+
+Required properties:
+
+- compatible :	should be "fsl,imx7ulp-tpm"
+- reg :		Specifies base physical address and size of the register sets
+		for the clock event device and clock source device.
+- interrupts :	Should be the clock event device interrupt.
+- clocks :	The clocks provided by the SoC to drive the timer, must contain
+		an entry for each entry in clock-names.
+- clock-names : Must include the following entries: "igp" and "per".
+
+Example:
+tpm5: tpm@40260000 {
+	compatible = "fsl,imx7ulp-tpm";
+	reg = <0x40260000 0x1000>;
+	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
+		 <&clks IMX7ULP_CLK_LPTPM5>;
+	clock-names = "ipg", "per";
+};
-- 
2.7.4

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#1722278 — [PATCH 3/9] devicetree: bindings: Remove sh7372 CMT binding

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 11:40 +0200
Subject[PATCH 3/9] devicetree: bindings: Remove sh7372 CMT binding
Message-ID<ujLa2-T4-37@gated-at.bofh.it>
In reply to#1722277
From: Magnus Damm <damm+renesas@opensource.se>

Remove the sh7372 CMT compat string to reduce maintenance burden.

It should be fine to break DT compatibility because:
1) The sh7372 SoC support has been removed from upstream
2) The sh7372 CMT DT binding was never part of upstream DTS
3) The CMT driver never matches on the sh7372 binding

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 Documentation/devicetree/bindings/timer/renesas,cmt.txt | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index 1a05c1b..961c0b6 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -14,32 +14,26 @@ Required Properties:
   - compatible: must contain one or more of the following:
     - "renesas,cmt-32-r8a7740" for the r8a7740 32-bit CMT
 		(CMT0)
-    - "renesas,cmt-32-sh7372" for the sh7372 32-bit CMT
-		(CMT0)
     - "renesas,cmt-32-sh73a0" for the sh73a0 32-bit CMT
 		(CMT0)
     - "renesas,cmt-32" for all 32-bit CMT without fast clock support
-		(CMT0 on sh7372, sh73a0 and r8a7740)
+		(CMT0 on sh73a0 and r8a7740)
 		This is a fallback for the above renesas,cmt-32-* entries.
 
     - "renesas,cmt-32-fast-r8a7740" for the r8a7740 32-bit CMT with fast
 		clock support (CMT[234])
-    - "renesas,cmt-32-fast-sh7372" for the sh7372 32-bit CMT with fast
-		clock support (CMT[234])
     - "renesas,cmt-32-fast-sh73a0" for the sh73A0 32-bit CMT with fast
 		clock support (CMT[234])
     - "renesas,cmt-32-fast" for all 32-bit CMT with fast clock support
-		(CMT[234] on sh7372, sh73a0 and r8a7740)
+		(CMT[234] on sh73a0 and r8a7740)
 		This is a fallback for the above renesas,cmt-32-fast-* entries.
 
-    - "renesas,cmt-48-sh7372" for the sh7372 48-bit CMT
-		(CMT1)
     - "renesas,cmt-48-sh73a0" for the sh73A0 48-bit CMT
 		(CMT1)
     - "renesas,cmt-48-r8a7740" for the r8a7740 48-bit CMT
 		(CMT1)
     - "renesas,cmt-48" for all non-second generation 48-bit CMT
-		(CMT1 on sh7372, sh73a0 and r8a7740)
+		(CMT1 on sh73a0 and r8a7740)
 		This is a fallback for the above renesas,cmt-48-* entries.
 
     - "renesas,cmt-48-r8a73a4" for the r8a73a4 48-bit CMT
-- 
2.7.4

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#1722279 — [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 11:40 +0200
Subject[PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujLa3-T4-39@gated-at.bofh.it>
In reply to#1722277
From: Markus Elfring <elfring@users.sourceforge.net>

The bcm2835_timer_init() function emits an error message in case of a memory
allocation failure. This is pointless as the mm core already do that.

Remove this message.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/bcm2835_timer.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
index 82828d3..39e489a 100644
--- a/drivers/clocksource/bcm2835_timer.c
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -114,7 +114,6 @@ static int __init bcm2835_timer_init(struct device_node *node)
 
 	timer = kzalloc(sizeof(*timer), GFP_KERNEL);
 	if (!timer) {
-		pr_err("Can't allocate timer struct\n");
 		ret = -ENOMEM;
 		goto err_iounmap;
 	}
-- 
2.7.4

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#1722362 — Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromSF Markus Elfring <elfring@users.sourceforge.net>
Date2017-08-29 13:30 +0200
SubjectRe: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujMSu-1Zf-15@gated-at.bofh.it>
In reply to#1722279
I would prefer to use the wording “for a” instead of “on” in the commit subject.


> The bcm2835_timer_init() function emits an error message in case of a memory
> allocation failure. This is pointless as the mm core already do that.

Does this commit message contain a typo?
Would a wording like “… does that already.” be more appropriate here?

Regards,
Markus

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#1722404 — Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 13:50 +0200
SubjectRe: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujNbR-25K-37@gated-at.bofh.it>
In reply to#1722362
On 29/08/2017 13:21, SF Markus Elfring wrote:
> I would prefer to use the wording “for a” instead of “on” in the commit subject.
> 
> 
>> The bcm2835_timer_init() function emits an error message in case of a memory
>> allocation failure. This is pointless as the mm core already do that.
> 
> Does this commit message contain a typo?
> Would a wording like “… does that already.” be more appropriate here?

Yep. Fixed.

Thanks.

  -- Daniel


-- 
 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

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#1722464 — Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 15:20 +0200
SubjectRe: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujOAW-37c-11@gated-at.bofh.it>
In reply to#1722404
On 29/08/2017 15:12, SF Markus Elfring wrote:
>>> Would a wording like “… does that already.” be more appropriate here?
>>
>> Yep. Fixed.
> 
> Thanks for this adjustment.
> https://git.linaro.org/people/daniel.lezcano/linux.git/commit/?h=clockevents/4.14&id=fd388bc07c2ca854f28f405bb65470647499dcaa
> 
> Do you disagree to my suggestion to amend also the commit subject?

Just wanted to keep it short.


-- 
 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog

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#1722490 — Re: clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromSF Markus Elfring <elfring@users.sourceforge.net>
Date2017-08-29 15:30 +0200
SubjectRe: clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujOKC-3av-7@gated-at.bofh.it>
In reply to#1722464
>> https://git.linaro.org/people/daniel.lezcano/linux.git/commit/?h=clockevents/4.14&id=fd388bc07c2ca854f28f405bb65470647499dcaa
>>
>> Do you disagree to my suggestion to amend also the commit subject?
> 
> Just wanted to keep it short.

I propose to reconsider the preposition which should be used in the title.

Regards,
Markus

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#1722491 — Re: clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 15:30 +0200
SubjectRe: clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujOKC-3av-13@gated-at.bofh.it>
In reply to#1722490
On 29/08/2017 15:20, SF Markus Elfring wrote:
>>> https://git.linaro.org/people/daniel.lezcano/linux.git/commit/?h=clockevents/4.14&id=fd388bc07c2ca854f28f405bb65470647499dcaa
>>>
>>> Do you disagree to my suggestion to amend also the commit subject?
>>
>> Just wanted to keep it short.
> 
> I propose to reconsider the preposition which should be used in the title.

Done.


-- 
 <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs

Follow Linaro:  <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
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#1722481 — Re: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure

FromSF Markus Elfring <elfring@users.sourceforge.net>
Date2017-08-29 15:20 +0200
SubjectRe: [PATCH 9/9] clocksource/drivers/bcm2835: Remove message on memory allocation failure
Message-ID<ujOAW-37c-13@gated-at.bofh.it>
In reply to#1722404
>> Would a wording like “… does that already.” be more appropriate here?
> 
> Yep. Fixed.

Thanks for this adjustment.
https://git.linaro.org/people/daniel.lezcano/linux.git/commit/?h=clockevents/4.14&id=fd388bc07c2ca854f28f405bb65470647499dcaa

Do you disagree to my suggestion to amend also the commit subject?

Regards,
Markus

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#1722281 — [PATCH 2/9] clocksource/drivers/imx-tpm: Add imx tpm timer support

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 11:40 +0200
Subject[PATCH 2/9] clocksource/drivers/imx-tpm: Add imx tpm timer support
Message-ID<ujLa3-T4-41@gated-at.bofh.it>
In reply to#1722277
From: Dong Aisheng <aisheng.dong@nxp.com>

IMX Timer/PWM Module (TPM) supports both timer and pwm function while
this patch only adds the timer support. PWM would be added later.

The TPM counter, compare and capture registers are clocked by an
asynchronous clock that can remain enabled in low power modes.

NOTE: We observed in a very small probability, the bus fabric
contention between GPU and A7 may results a few cycles delay
of writing CNT registers which may cause the min_delta event got
missed, so we need add a ETIME check here in case it happened.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Anson Huang <Anson.Huang@nxp.com>
Cc: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 drivers/clocksource/Kconfig         |   8 ++
 drivers/clocksource/Makefile        |   1 +
 drivers/clocksource/timer-imx-tpm.c | 239 ++++++++++++++++++++++++++++++++++++
 3 files changed, 248 insertions(+)
 create mode 100644 drivers/clocksource/timer-imx-tpm.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index fcae5ca..0a953fc 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -598,6 +598,14 @@ config CLKSRC_IMX_GPT
 	depends on ARM && CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 
+config CLKSRC_IMX_TPM
+	bool "Clocksource using i.MX TPM" if COMPILE_TEST
+	depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS
+	select CLKSRC_MMIO
+	help
+	  Enable this option to use IMX Timer/PWM Module (TPM) timer as
+	  clocksource.
+
 config CLKSRC_ST_LPC
 	bool "Low power clocksource found in the LPC" if COMPILE_TEST
 	select TIMER_OF if OF
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 6df9494..dbc1ad1 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_CLKSRC_VERSATILE)		+= versatile.o
 obj-$(CONFIG_CLKSRC_MIPS_GIC)		+= mips-gic-timer.o
 obj-$(CONFIG_CLKSRC_TANGO_XTAL)		+= tango_xtal.o
 obj-$(CONFIG_CLKSRC_IMX_GPT)		+= timer-imx-gpt.o
+obj-$(CONFIG_CLKSRC_IMX_TPM)		+= timer-imx-tpm.o
 obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o
 obj-$(CONFIG_H8300_TMR8)		+= h8300_timer8.o
 obj-$(CONFIG_H8300_TMR16)		+= h8300_timer16.o
diff --git a/drivers/clocksource/timer-imx-tpm.c b/drivers/clocksource/timer-imx-tpm.c
new file mode 100644
index 0000000..21bffdc
--- /dev/null
+++ b/drivers/clocksource/timer-imx-tpm.c
@@ -0,0 +1,239 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sched_clock.h>
+
+#define TPM_SC				0x10
+#define TPM_SC_CMOD_INC_PER_CNT		(0x1 << 3)
+#define TPM_SC_CMOD_DIV_DEFAULT		0x3
+#define TPM_CNT				0x14
+#define TPM_MOD				0x18
+#define TPM_STATUS			0x1c
+#define TPM_STATUS_CH0F			BIT(0)
+#define TPM_C0SC			0x20
+#define TPM_C0SC_CHIE			BIT(6)
+#define TPM_C0SC_MODE_SHIFT		2
+#define TPM_C0SC_MODE_MASK		0x3c
+#define TPM_C0SC_MODE_SW_COMPARE	0x4
+#define TPM_C0V				0x24
+
+static void __iomem *timer_base;
+static struct clock_event_device clockevent_tpm;
+
+static inline void tpm_timer_disable(void)
+{
+	unsigned int val;
+
+	/* channel disable */
+	val = readl(timer_base + TPM_C0SC);
+	val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
+	writel(val, timer_base + TPM_C0SC);
+}
+
+static inline void tpm_timer_enable(void)
+{
+	unsigned int val;
+
+	/* channel enabled in sw compare mode */
+	val = readl(timer_base + TPM_C0SC);
+	val |= (TPM_C0SC_MODE_SW_COMPARE << TPM_C0SC_MODE_SHIFT) |
+	       TPM_C0SC_CHIE;
+	writel(val, timer_base + TPM_C0SC);
+}
+
+static inline void tpm_irq_acknowledge(void)
+{
+	writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS);
+}
+
+static struct delay_timer tpm_delay_timer;
+
+static inline unsigned long tpm_read_counter(void)
+{
+	return readl(timer_base + TPM_CNT);
+}
+
+static unsigned long tpm_read_current_timer(void)
+{
+	return tpm_read_counter();
+}
+
+static u64 notrace tpm_read_sched_clock(void)
+{
+	return tpm_read_counter();
+}
+
+static int __init tpm_clocksource_init(unsigned long rate)
+{
+	tpm_delay_timer.read_current_timer = &tpm_read_current_timer;
+	tpm_delay_timer.freq = rate;
+	register_current_timer_delay(&tpm_delay_timer);
+
+	sched_clock_register(tpm_read_sched_clock, 32, rate);
+
+	return clocksource_mmio_init(timer_base + TPM_CNT, "imx-tpm",
+				     rate, 200, 32, clocksource_mmio_readl_up);
+}
+
+static int tpm_set_next_event(unsigned long delta,
+				struct clock_event_device *evt)
+{
+	unsigned long next, now;
+
+	next = tpm_read_counter();
+	next += delta;
+	writel(next, timer_base + TPM_C0V);
+	now = tpm_read_counter();
+
+	/*
+	 * NOTE: We observed in a very small probability, the bus fabric
+	 * contention between GPU and A7 may results a few cycles delay
+	 * of writing CNT registers which may cause the min_delta event got
+	 * missed, so we need add a ETIME check here in case it happened.
+	 */
+	return (int)((next - now) <= 0) ? -ETIME : 0;
+}
+
+static int tpm_set_state_oneshot(struct clock_event_device *evt)
+{
+	tpm_timer_enable();
+
+	return 0;
+}
+
+static int tpm_set_state_shutdown(struct clock_event_device *evt)
+{
+	tpm_timer_disable();
+
+	return 0;
+}
+
+static irqreturn_t tpm_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = dev_id;
+
+	tpm_irq_acknowledge();
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct clock_event_device clockevent_tpm = {
+	.name			= "i.MX7ULP TPM Timer",
+	.features		= CLOCK_EVT_FEAT_ONESHOT,
+	.set_state_oneshot	= tpm_set_state_oneshot,
+	.set_next_event		= tpm_set_next_event,
+	.set_state_shutdown	= tpm_set_state_shutdown,
+	.rating			= 200,
+};
+
+static int __init tpm_clockevent_init(unsigned long rate, int irq)
+{
+	int ret;
+
+	ret = request_irq(irq, tpm_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
+			  "i.MX7ULP TPM Timer", &clockevent_tpm);
+
+	clockevent_tpm.cpumask = cpumask_of(0);
+	clockevent_tpm.irq = irq;
+	clockevents_config_and_register(&clockevent_tpm,
+					rate, 300, 0xfffffffe);
+
+	return ret;
+}
+
+static int __init tpm_timer_init(struct device_node *np)
+{
+	struct clk *ipg, *per;
+	int irq, ret;
+	u32 rate;
+
+	timer_base = of_iomap(np, 0);
+	if (!timer_base) {
+		pr_err("tpm: failed to get base address\n");
+		return -ENXIO;
+	}
+
+	irq = irq_of_parse_and_map(np, 0);
+	if (!irq) {
+		pr_err("tpm: failed to get irq\n");
+		ret = -ENOENT;
+		goto err_iomap;
+	}
+
+	ipg = of_clk_get_by_name(np, "ipg");
+	per = of_clk_get_by_name(np, "per");
+	if (IS_ERR(ipg) || IS_ERR(per)) {
+		pr_err("tpm: failed to get igp or per clk\n");
+		ret = -ENODEV;
+		goto err_clk_get;
+	}
+
+	/* enable clk before accessing registers */
+	ret = clk_prepare_enable(ipg);
+	if (ret) {
+		pr_err("tpm: ipg clock enable failed (%d)\n", ret);
+		goto err_clk_get;
+	}
+
+	ret = clk_prepare_enable(per);
+	if (ret) {
+		pr_err("tpm: per clock enable failed (%d)\n", ret);
+		goto err_per_clk_enable;
+	}
+
+	/*
+	 * Initialize tpm module to a known state
+	 * 1) Counter disabled
+	 * 2) TPM counter operates in up counting mode
+	 * 3) Timer Overflow Interrupt disabled
+	 * 4) Channel0 disabled
+	 * 5) DMA transfers disabled
+	 */
+	writel(0, timer_base + TPM_SC);
+	writel(0, timer_base + TPM_CNT);
+	writel(0, timer_base + TPM_C0SC);
+
+	/* increase per cnt, div 8 by default */
+	writel(TPM_SC_CMOD_INC_PER_CNT | TPM_SC_CMOD_DIV_DEFAULT,
+		     timer_base + TPM_SC);
+
+	/* set MOD register to maximum for free running mode */
+	writel(0xffffffff, timer_base + TPM_MOD);
+
+	rate = clk_get_rate(per) >> 3;
+	ret = tpm_clocksource_init(rate);
+	if (ret)
+		goto err_per_clk_enable;
+
+	ret = tpm_clockevent_init(rate, irq);
+	if (ret)
+		goto err_per_clk_enable;
+
+	return 0;
+
+err_per_clk_enable:
+	clk_disable_unprepare(ipg);
+err_clk_get:
+	clk_put(per);
+	clk_put(ipg);
+err_iomap:
+	iounmap(timer_base);
+	return ret;
+}
+TIMER_OF_DECLARE(imx7ulp, "fsl,imx7ulp-tpm", tpm_timer_init);
-- 
2.7.4

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#1722283 — [PATCH 6/9] devicetree: bindings: Deprecate property, update example

FromDaniel Lezcano <daniel.lezcano@linaro.org>
Date2017-08-29 11:40 +0200
Subject[PATCH 6/9] devicetree: bindings: Deprecate property, update example
Message-ID<ujLa3-T4-49@gated-at.bofh.it>
In reply to#1722277
From: Magnus Damm <damm+renesas@opensource.se>

Deprecate "renesas,channels-mask" and update the r8a7790 CMT example.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
---
 .../devicetree/bindings/timer/renesas,cmt.txt      | 24 +++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.txt b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
index e81e0d2..8fb7c93 100644
--- a/Documentation/devicetree/bindings/timer/renesas,cmt.txt
+++ b/Documentation/devicetree/bindings/timer/renesas,cmt.txt
@@ -60,21 +60,31 @@ Required Properties:
     in clock-names.
   - clock-names: must contain "fck" for the functional clock.
 
-  - renesas,channels-mask: bitmask of the available channels.
+  - renesas,channels-mask: <deprecated>, information kept in device driver.
 
 
-Example: R8A7790 (R-Car H2) CMT0 node
-
-	CMT0 on R8A7790 implements hardware channels 5 and 6 only and names
-	them channels 0 and 1 in the documentation.
+Example: R8A7790 (R-Car H2) CMT0 and CMT1 nodes
 
 	cmt0: timer@ffca0000 {
-		compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
+		compatible = "renesas,cmt0-r8a7790", "renesas,rcar-gen2-cmt0";
 		reg = <0 0xffca0000 0 0x1004>;
 		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
 			     <0 142 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
 		clock-names = "fck";
+	};
 
-		renesas,channels-mask = <0x60>;
+	cmt1: timer@e6130000 {
+		compatible = "renesas,cmt1-r8a7790", "renesas,rcar-gen2-cmt1";
+		reg = <0 0xe6130000 0 0x1004>;
+		interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 121 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 122 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 123 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 124 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 125 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 126 IRQ_TYPE_LEVEL_HIGH>,
+			     <0 127 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
+		clock-names = "fck";
 	};
-- 
2.7.4

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