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| Started by | Bjorn Helgaas <helgaas@kernel.org> |
|---|---|
| First post | 2017-08-22 23:10 +0200 |
| Last post | 2017-08-23 00:50 +0200 |
| Articles | 2 — 2 participants |
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Re: [PATCH] PCI: Fix and amend express capability sizes Bjorn Helgaas <helgaas@kernel.org> - 2017-08-22 23:10 +0200
Re: [PATCH] PCI: Fix and amend express capability sizes Alex Williamson <alex.williamson@redhat.com> - 2017-08-23 00:50 +0200
| From | Bjorn Helgaas <helgaas@kernel.org> |
|---|---|
| Date | 2017-08-22 23:10 +0200 |
| Subject | Re: [PATCH] PCI: Fix and amend express capability sizes |
| Message-ID | <uhoAW-7V4-19@gated-at.bofh.it> |
On Thu, Aug 10, 2017 at 10:54:31AM -0600, Alex Williamson wrote: > PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express > capability structure for v1 devices with link, but we also have a need > in the vfio code for sizing the capability for devices without link, > such as root complex endpoints. Create a separate define for this > ending the structure before the link fields. > > Additionally, this reveals that PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 is > currently incorrect, ending the capability length before the v2 link > fields. Rename this to specify an RC endpoint (no link) capability > length and move PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 to include the link > fields as we have for the v1 version. > > Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Applied with Eric's reviewed-by to pci/misc for v4.14, thanks! I think there was an underscore missing here: > -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ > +#define PCI_CAP_EXP_RC ENDPOINT_SIZEOF_V2 44 /* v2 endpoints without link end here */
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| From | Alex Williamson <alex.williamson@redhat.com> |
|---|---|
| Date | 2017-08-23 00:50 +0200 |
| Message-ID | <uhq9H-lR-5@gated-at.bofh.it> |
| In reply to | #1717841 |
On Tue, 22 Aug 2017 16:05:01 -0500 Bjorn Helgaas <helgaas@kernel.org> wrote: > On Thu, Aug 10, 2017 at 10:54:31AM -0600, Alex Williamson wrote: > > PCI_CAP_EXP_ENDPOINT_SIZEOF_V1 defines the size of the PCIe express > > capability structure for v1 devices with link, but we also have a need > > in the vfio code for sizing the capability for devices without link, > > such as root complex endpoints. Create a separate define for this > > ending the structure before the link fields. > > > > Additionally, this reveals that PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 is > > currently incorrect, ending the capability length before the v2 link > > fields. Rename this to specify an RC endpoint (no link) capability > > length and move PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 to include the link > > fields as we have for the v1 version. > > > > Signed-off-by: Alex Williamson <alex.williamson@redhat.com> > > Applied with Eric's reviewed-by to pci/misc for v4.14, thanks! > > I think there was an underscore missing here: > > > -#define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ > > +#define PCI_CAP_EXP_RC ENDPOINT_SIZEOF_V2 44 /* v2 endpoints without link end here */ Urgh, not sure how that happened. Thanks for the fixup! Alex
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