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| Started by | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| First post | 2017-08-22 14:50 +0200 |
| Last post | 2017-08-22 14:50 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH] pinctrl: aspeed: Fix hardware strap register write logic Linus Walleij <linus.walleij@linaro.org> - 2017-08-22 14:50 +0200
| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2017-08-22 14:50 +0200 |
| Subject | Re: [PATCH] pinctrl: aspeed: Fix hardware strap register write logic |
| Message-ID | <uhgN4-2rg-7@gated-at.bofh.it> |
On Fri, Aug 11, 2017 at 9:27 AM, Yong Li <sdliyong@gmail.com> wrote: > The hardware strap register(SCU70) only accepts write ‘1’, > to clear it to ‘0’, must set bits(write ‘1’) to SCU7C > > Signed-off-by: Yong Li <sdliyong@gmail.com> I'm waiting for an updated patch addressing Andrew's comment (unless there is one in my mailbox, already, I am swamped as usual). Yours, Linus Walleij
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