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[PATCH 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for RV1108 in dts

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  [PATCH 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for RV1108 in dts Rocky Hao <rocky.hao@rock-chips.com> - 2017-08-24 12:30 +0200
    [PATCH 2/5] thermal: rockchip: Support the RV1108 SoC in thermal driver Rocky Hao <rocky.hao@rock-chips.com> - 2017-08-24 12:40 +0200
    [PATCH 4/5] arm: dts: rockchip: add thermal nodes for RV1108 SoC Rocky Hao <rocky.hao@rock-chips.com> - 2017-08-24 12:40 +0200

#1719130 — [PATCH 0/5] thermal: rockchip: add tsadc support in thermal driver and IPA thermal control for RV1108 in dts

This series patches add the tsadc support in thermal driver and in devicetree for RV1108.
Also add thermal control with Intelligent Power Allocation (IPA) policy by default.  Please
refer to https://developer.arm.com/open-source/intelligent-power-allocation for more information
about IPA.

Rocky Hao (5):
  dt-bindings: rockchip-thermal: Support the RV1108 SoC compatible
  thermal: rockchip: Support the RV1108 SoC in thermal driver
  arm: dts: rockchip: add tsadc node for RV1108 SoC
  arm: dts: rockchip: add thermal nodes for RV1108 SoC
  arm: dts: rockchip: enable tsadc module on RV1108 evaluation board

 .../bindings/thermal/rockchip-thermal.txt          |  1 +
 arch/arm/boot/dts/rv1108-evb.dts                   |  4 ++
 arch/arm/boot/dts/rv1108.dtsi                      | 69 ++++++++++++++++++++++
 drivers/thermal/rockchip_thermal.c                 | 67 +++++++++++++++++++++
 4 files changed, 141 insertions(+)

-- 
1.9.1

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#1719137 — [PATCH 2/5] thermal: rockchip: Support the RV1108 SoC in thermal driver

RV1108 SOC has one Temperature Sensor for CPU.

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
 drivers/thermal/rockchip_thermal.c | 67 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 67 insertions(+)

diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 9da3e1819210..299a8ade71fa 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -242,6 +242,45 @@ struct tsadc_table {
 	int temp;
 };
 
+static const struct tsadc_table rv1108_table[] = {
+	{0, -40000},
+	{374, -40000},
+	{382, -35000},
+	{389, -30000},
+	{397, -25000},
+	{405, -20000},
+	{413, -15000},
+	{421, -10000},
+	{429, -5000},
+	{436, 0},
+	{444, 5000},
+	{452, 10000},
+	{460, 15000},
+	{468, 20000},
+	{476, 25000},
+	{483, 30000},
+	{491, 35000},
+	{499, 40000},
+	{507, 45000},
+	{515, 50000},
+	{523, 55000},
+	{531, 60000},
+	{539, 65000},
+	{547, 70000},
+	{555, 75000},
+	{562, 80000},
+	{570, 85000},
+	{578, 90000},
+	{586, 95000},
+	{594, 100000},
+	{602, 105000},
+	{610, 110000},
+	{618, 115000},
+	{626, 120000},
+	{634, 125000},
+	{TSADCV2_DATA_MASK, 125000},
+};
+
 static const struct tsadc_table rk3228_code_table[] = {
 	{0, -40000},
 	{588, -40000},
@@ -779,6 +818,30 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 	writel_relaxed(val, regs + TSADCV2_INT_EN);
 }
 
+static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
+	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+	.chn_num = 1, /* one channel for tsadc */
+
+	.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+	.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+	.tshut_temp = 95000,
+
+	.initialize = rk_tsadcv2_initialize,
+	.irq_ack = rk_tsadcv3_irq_ack,
+	.control = rk_tsadcv3_control,
+	.get_temp = rk_tsadcv2_get_temp,
+	.set_alarm_temp = rk_tsadcv2_alarm_temp,
+	.set_tshut_temp = rk_tsadcv2_tshut_temp,
+	.set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+	.table = {
+		.id = rv1108_table,
+		.length = ARRAY_SIZE(rv1108_table),
+		.data_mask = TSADCV2_DATA_MASK,
+		.mode = ADC_INCREMENT,
+	},
+};
+
 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
 	.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
 	.chn_num = 1, /* one channel for tsadc */
@@ -928,6 +991,10 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
 
 static const struct of_device_id of_rockchip_thermal_match[] = {
 	{
+		.compatible = "rockchip,rv1108-tsadc",
+		.data = (void *)&rv1108_tsadc_data,
+	},
+	{
 		.compatible = "rockchip,rk3228-tsadc",
 		.data = (void *)&rk3228_tsadc_data,
 	},
-- 
1.9.1

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#1719138 — [PATCH 4/5] arm: dts: rockchip: add thermal nodes for RV1108 SoC

Add thermal zone and dynamic CPU power coefficients for RV1108

Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---
 arch/arm/boot/dts/rv1108.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index dbdd8c2180e7..cae920b6a145 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -43,6 +43,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/clock/rv1108-cru.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/thermal/thermal.h>
 / {
 	#address-cells = <1>;
 	#size-cells = <1>;
@@ -69,6 +70,8 @@
 			device_type = "cpu";
 			compatible = "arm,cortex-a7";
 			reg = <0xf00>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <75>;
 		};
 	};
 
@@ -275,6 +278,43 @@
 		status = "disabled";
 	};
 
+	thermal-zones {
+		soc_thermal: soc-thermal {
+			polling-delay-passive = <20>;
+			polling-delay = <1000>;
+			sustainable-power = <50>;
+
+			thermal-sensors = <&tsadc 0>;
+
+			trips {
+				threshold: trip-point0 {
+					temperature = <70000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				target: trip-point1 {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				soc_crit: soc-crit {
+					temperature = <95000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <4096>;
+				};
+			};
+		};
+
+	};
+
 	tsadc: tsadc@10370000 {
 		compatible = "rockchip,rv1108-tsadc";
 		reg = <0x10370000 0x100>;
-- 
1.9.1

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