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| Started by | Michael Ellerman <patch-notifications@ellerman.id.au> |
|---|---|
| First post | 2017-08-07 12:50 +0200 |
| Last post | 2017-08-07 12:50 +0200 |
| Articles | 1 — 1 participant |
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Re: [v3, 1/2] powernv/powerpc:Save/Restore additional SPRs for stop4 cpuidle Michael Ellerman <patch-notifications@ellerman.id.au> - 2017-08-07 12:50 +0200
| From | Michael Ellerman <patch-notifications@ellerman.id.au> |
|---|---|
| Date | 2017-08-07 12:50 +0200 |
| Subject | Re: [v3, 1/2] powernv/powerpc:Save/Restore additional SPRs for stop4 cpuidle |
| Message-ID | <ubNLH-74u-9@gated-at.bofh.it> |
On Fri, 2017-07-21 at 10:41:37 UTC, "Gautham R. Shenoy" wrote: > From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com> > > The stop4 idle state on POWER9 is a deep idle state which loses > hypervisor resources, but whose latency is low enough that it can be > exposed via cpuidle. > > Until now, the deep idle states which lose hypervisor resources (eg: > winkle) were only exposed via CPU-Hotplug. Hence currently on wakeup > from such states, barring a few SPRs which need to be restored to > their older value, rest of the SPRS are reinitialized to their values > corresponding to that at boot time. > > When stop4 is used in the context of cpuidle, we want these additional > SPRs to be restored to their older value, to ensure that the context > on the CPU coming back from idle is same as it was before going idle. > > In this patch, we define a SPR save area in PACA (since we have used > up the volatile register space in the stack) and on POWER9, we restore > SPRN_PID, SPRN_LDBAR, SPRN_FSCR, SPRN_HFSCR, SPRN_MMCRA, SPRN_MMCR1, > SPRN_MMCR2 to the values they had before entering stop. > > Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com> > Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Series applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/e1c1cfed54326fd2b17c78f0c85092 cheers
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