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| Started by | Suzuki K Poulose <Suzuki.Poulose@arm.com> |
|---|---|
| First post | 2017-08-07 11:40 +0200 |
| Last post | 2017-08-07 11:40 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters Suzuki K Poulose <Suzuki.Poulose@arm.com> - 2017-08-07 11:40 +0200
| From | Suzuki K Poulose <Suzuki.Poulose@arm.com> |
|---|---|
| Date | 2017-08-07 11:40 +0200 |
| Subject | Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters |
| Message-ID | <ubMFX-6qF-3@gated-at.bofh.it> |
On 27/07/17 10:08, Jan Glauber wrote: > On Thu, Jul 27, 2017 at 07:11:57AM +0200, Borislav Petkov wrote: >> On Wed, Jul 26, 2017 at 02:02:42PM -0700, David Daney wrote: >>> Also, if a given configuration disables CONFIG_EDAC there is some hackery >>> needed to get the perf portion of the driver included. >> >> Yes, and we don't do performance counters in EDAC. >> >> So you could add a small memory controller driver which does the >> arbitration or fix the firmware. > > OK. As fixing the firmware will take quite some time I'll go for the memory > controller driver that starts EDAC / PMU depending on their CONFIG_. Please could you also rename CAVIUM_PMU to something like CAVIUM_MMC_PMU or even CAVIUM_UNCOR_PMU ? The symbol could easily be mistaken for a "cavium" CPU PMU. Suzuki > > What would be the proper location for the multiplexer? > drivers/soc/cavium or drivers/misc? > > --Jan >
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