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Re: [linux-sunxi] [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change

Started byChen-Yu Tsai <wens@csie.org>
First post2017-08-04 06:20 +0200
Last post2017-08-04 06:20 +0200
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  Re: [linux-sunxi] [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate  PLL CPU clk after rate change Chen-Yu Tsai <wens@csie.org> - 2017-08-04 06:20 +0200

#1703646 — Re: [linux-sunxi] [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change

FromChen-Yu Tsai <wens@csie.org>
Date2017-08-04 06:20 +0200
SubjectRe: [linux-sunxi] [PATCH 05/10] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change
Message-ID<uaCfE-218-11@gated-at.bofh.it>
On Wed, Jul 26, 2017 at 3:14 PM, Chen-Yu Tsai <wens@csie.org> wrote:
> On Sun, Jul 23, 2017 at 6:27 PM, Icenowy Zheng <icenowy@aosc.io> wrote:
>> From: Chen-Yu Tsai <wens@csie.org>
>>
>> This patch utilizes the new PLL clk notifier to gate then ungate the
>> PLL CPU clock after rate changes. This should prevent any system hangs
>> resulting from cpufreq changes to the clk.
>>
>> Reported-by: Ondrej Jirman <megous@megous.com>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> Tested-by: Icenowy Zheng <icenowy@aosc.io>
>
> This is missing
>
> Fixes: 0577e4853bfb ("clk: sunxi-ng: Add H3 clocks")

Applied for 4.14 with the Fixes tag and Stephen's ack.

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