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Groups > linux.kernel > #1701931 > unrolled thread

[PATCH 0/3] IPI: Avoid to use 2 cache lines for one call_single_data

Started by"Huang, Ying" <ying.huang@intel.com>
First post2017-08-02 11:00 +0200
Last post2017-08-02 16:00 +0200
Articles 2 — 2 participants

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  [PATCH 0/3] IPI: Avoid to use 2 cache lines for one call_single_data "Huang, Ying" <ying.huang@intel.com> - 2017-08-02 11:00 +0200
    Re: [PATCH 0/3] IPI: Avoid to use 2 cache lines for one  call_single_data Christopher Lameter <cl@linux.com> - 2017-08-02 16:00 +0200

#1701931 — [PATCH 0/3] IPI: Avoid to use 2 cache lines for one call_single_data

From"Huang, Ying" <ying.huang@intel.com>
Date2017-08-02 11:00 +0200
Subject[PATCH 0/3] IPI: Avoid to use 2 cache lines for one call_single_data
Message-ID<u9XFv-7As-5@gated-at.bofh.it>
From: Huang Ying <ying.huang@intel.com>

struct call_single_data is used in IPI to transfer information between
CPUs.  Its size is bigger than sizeof(unsigned long) and less than
cache line size.  Now, it is allocated with no any alignment
requirement.  This makes it possible for allocated call_single_data to
cross 2 cache lines.  So that double the number of the cache lines
that need to be transferred among CPUs.  This is resolved by aligning
the allocated call_single_data with cache line size.

To allocate cache line size aligned percpu memory dynamically,
alloc_percpu_aligned() is introduced and used in iova drivers too.

To test the effect of the patch, we use the vm-scalability multiple
thread swap test case (swap-w-seq-mt).  The test will create multiple
threads and each thread will eat memory until all RAM and part of swap
is used, so that huge number of IPI will be triggered when unmapping
memory.  In the test, the throughput of memory writing improves ~5%
compared with misaligned call_single_data because of faster IPI.

Best Regards,
Huang, Ying

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#1702130 — Re: [PATCH 0/3] IPI: Avoid to use 2 cache lines for one call_single_data

FromChristopher Lameter <cl@linux.com>
Date2017-08-02 16:00 +0200
SubjectRe: [PATCH 0/3] IPI: Avoid to use 2 cache lines for one call_single_data
Message-ID<ua2lQ-281-23@gated-at.bofh.it>
In reply to#1701931
On Wed, 2 Aug 2017, Huang, Ying wrote:

> To allocate cache line size aligned percpu memory dynamically,
> alloc_percpu_aligned() is introduced and used in iova drivers too.

alloc_percpu() already aligns objects as specified when they are declared.

Moreover the function is improperly named since it aligns
to a cacheline(). If you want this then you would use

alloc_percpu_cacheline_aligned()

But then the alignment can already be requested by adding
__cacheline_aligned to the per cpu definition.

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