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Re: [PATCH 0/3] simulated interrupts

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  Re: [PATCH 0/3] simulated interrupts Linus Walleij <linus.walleij@linaro.org> - 2017-08-02 13:40 +0200

#1702030 — Re: [PATCH 0/3] simulated interrupts

On Wed, Jul 19, 2017 at 4:19 PM, Marc Zyngier <marc.zyngier@arm.com> wrote:

> On a slightly tangential subject, there is another aspect that I thought
> of implementing for a while, but always ended up just relying on a quick
> hack: forcing the injection of an actual interrupt. A number of
> interrupt controllers have the ability to make an interrupt pending, for
> it to be handled as if a device had actually triggered it.

This would be especially useful for a class of embedded systems that
are woken up from deep sleep by an asynchronous interrupt controller.

Usually GPIO(-ish) lines are armed and the system put to sleep, and
when it comes up, the information of what line woke it up is there in a
special register, but the actual (synchronous) interrupt line is no longer
asserted or edge triggered, so an interrupt need to be inserted.

Yours,
Linus Walleij

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