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[PATCHv4 2/3] ARM:socfpga-defconfig Intel FPGA Video and Image Processing Suite

Started by"Hean Loong, Ong" <hean.loong.ong@intel.com>
First post2017-08-01 04:40 +0200
Last post2017-08-01 04:40 +0200
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  [PATCHv4 2/3] ARM:socfpga-defconfig Intel FPGA Video and Image Processing Suite "Hean Loong, Ong" <hean.loong.ong@intel.com> - 2017-08-01 04:40 +0200

#1700590 — [PATCHv4 2/3] ARM:socfpga-defconfig Intel FPGA Video and Image Processing Suite

From"Hean Loong, Ong" <hean.loong.ong@intel.com>
Date2017-08-01 04:40 +0200
Subject[PATCHv4 2/3] ARM:socfpga-defconfig Intel FPGA Video and Image Processing Suite
Message-ID<u9vgd-5UI-1@gated-at.bofh.it>
From: Ong Hean Loong <hean.loong.ong@intel.com>

Intel FPGA Video and Image Processing Suite Frame Buffer II
driver config for Arria 10 devkit and its variants

Signed-off-by: Ong, Hean Loong <hean.loong.ong@intel.com>
---
 arch/arm/configs/socfpga_defconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index 2620ce7..255f553 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -111,6 +111,12 @@ CONFIG_MFD_ALTERA_A10SR=y
 CONFIG_MFD_STMPE=y
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_DRM=m
+CONFIG_DRM_IVIP=m
+CONFIG_DRM_IVIP_OF=m
+CONFIG_FB=y
+CONFIG_FB_SIMPLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=m
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_DWC2=y
-- 
2.7.4

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