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| Started by | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| First post | 2017-07-31 08:30 +0200 |
| Last post | 2017-08-01 10:20 +0200 |
| Articles | 3 — 2 participants |
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[PATCH 0/6] pinctrl: uniphier: UniPhier pinctrl updates for v4.14 Masahiro Yamada <yamada.masahiro@socionext.com> - 2017-07-31 08:30 +0200
Re: [PATCH 4/6] pinctrl: uniphier: omit redundant input enable bit information Linus Walleij <linus.walleij@linaro.org> - 2017-08-01 10:20 +0200
Re: [PATCH 3/6] pinctrl: uniphier: clean up GPIO port muxing Linus Walleij <linus.walleij@linaro.org> - 2017-08-01 10:20 +0200
| From | Masahiro Yamada <yamada.masahiro@socionext.com> |
|---|---|
| Date | 2017-07-31 08:30 +0200 |
| Subject | [PATCH 0/6] pinctrl: uniphier: UniPhier pinctrl updates for v4.14 |
| Message-ID | <u9cng-2LC-5@gated-at.bofh.it> |
This series includes: - Clean up redundant pin data - Add simple suspend / resume support - Add a driver for a new SoC Masahiro Yamada (6): pinctrl: uniphier: remove unneeded EXPORT_SYMBOL_GPL() pinctrl: uniphier: fix pin_config_get() for input-enable pinctrl: uniphier: clean up GPIO port muxing pinctrl: uniphier: omit redundant input enable bit information pinctrl: uniphier: add suspend / resume support pinctrl: uniphier: add UniPhier PXs3 pinctrl driver drivers/pinctrl/uniphier/Kconfig | 4 + drivers/pinctrl/uniphier/Makefile | 1 + drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | 277 +++++-- drivers/pinctrl/uniphier/pinctrl-uniphier-ld11.c | 660 ++++----------- drivers/pinctrl/uniphier/pinctrl-uniphier-ld20.c | 709 +++++----------- drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c | 273 +------ drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c | 386 +-------- drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c | 451 +---------- drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 458 +---------- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c | 386 +-------- drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c | 989 +++++++++++++++++++++++ drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c | 273 +------ drivers/pinctrl/uniphier/pinctrl-uniphier.h | 40 +- 13 files changed, 1809 insertions(+), 3098 deletions(-) create mode 100644 drivers/pinctrl/uniphier/pinctrl-uniphier-pxs3.c -- 2.7.4
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2017-08-01 10:20 +0200 |
| Subject | Re: [PATCH 4/6] pinctrl: uniphier: omit redundant input enable bit information |
| Message-ID | <u9Azg-Lh-21@gated-at.bofh.it> |
| In reply to | #1699721 |
On Mon, Jul 31, 2017 at 8:21 AM, Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > For LD11/20 SoCs (capable of per-pin input enable), the iectrl bit > number matches its pin number. So, this is redundant information. > Instead, we just need a flag to know if the iectrl gating exists or not. > > With this refactoring, 5 bits in pin data will be saved. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Patch applied. Yours, Linus Walleij
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| From | Linus Walleij <linus.walleij@linaro.org> |
|---|---|
| Date | 2017-08-01 10:20 +0200 |
| Subject | Re: [PATCH 3/6] pinctrl: uniphier: clean up GPIO port muxing |
| Message-ID | <u9Azg-Lh-31@gated-at.bofh.it> |
| In reply to | #1699721 |
On Mon, Jul 31, 2017 at 8:21 AM, Masahiro Yamada <yamada.masahiro@socionext.com> wrote: > There are a bunch of GPIO muxing data, but most of them are actually > unneeded because GPIO-to-pin mapping can be specified by "gpio-ranges" > DT properties. > > Tables that contain a set of GPIO pins are still needed for the named > mapping by "gpio-ranges-group-names". This is a much cleaner way for > UniPhier SoC family where GPIO numbers are not straight mapped to pin > numbers. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Patch applied. Yours, Linus Walleij
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