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| Started by | <honghui.zhang@mediatek.com> |
|---|---|
| First post | 2017-07-28 13:00 +0200 |
| Last post | 2017-07-28 13:00 +0200 |
| Articles | 2 — 1 participant |
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[PATCH v2 0/3] Add larbid init routine for mediatek's gen1 smi larb driver <honghui.zhang@mediatek.com> - 2017-07-28 13:00 +0200
[PATCH v2 2/3] dt-bindings: mediatek: add descriptions for larbid <honghui.zhang@mediatek.com> - 2017-07-28 13:00 +0200
| From | <honghui.zhang@mediatek.com> |
|---|---|
| Date | 2017-07-28 13:00 +0200 |
| Subject | [PATCH v2 0/3] Add larbid init routine for mediatek's gen1 smi larb driver |
| Message-ID | <u8b9T-2DD-3@gated-at.bofh.it> |
From: Honghui Zhang <honghui.zhang@mediatek.com>
Mediatek's gen1 smi need the hardware larbid to identify the offset for
the register which controls whether enable iommu for this larb.
In the commit 3c8f4ad85c4b ("memory/mediatek: add support for mt2701"),
the larbid was used without properly initialized. This patchset fixed
that.
This patchset was based on the v2 version of the patch:
memory: mtk-smi: Use of_device_get_match_data helper[1],
which was base on 4.13-rc1
[1] https://patchwork.kernel.org/patch/9864719
Change since v1:
- Using mtk_smi_larb_gen to identify whether larbid was needed instead of
checking hard code bindings.
Honghui Zhang (3):
memory: mtk-smi: add larbid handle routine
dt-bindings: mediatek: add descriptions for larbid
arm: dts: mediatek: add larbid property for larb
.../bindings/memory-controllers/mediatek,smi-larb.txt | 15 +++++++++++++++
arch/arm/boot/dts/mt2701.dtsi | 3 +++
drivers/memory/mtk-smi.c | 12 ++++++++++++
3 files changed, 30 insertions(+)
--
2.6.4
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| From | <honghui.zhang@mediatek.com> |
|---|---|
| Date | 2017-07-28 13:00 +0200 |
| Subject | [PATCH v2 2/3] dt-bindings: mediatek: add descriptions for larbid |
| Message-ID | <u8b9U-2DD-25@gated-at.bofh.it> |
| In reply to | #1698688 |
From: Honghui Zhang <honghui.zhang@mediatek.com>
This patch add larbid descritptions for mediatek's gen1 smi larb hardware.
Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com>
---
.../bindings/memory-controllers/mediatek,smi-larb.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
index 21277a5..d1b115c 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
@@ -15,6 +15,9 @@ Required properties:
the register.
- "smi" : It's the clock for transfer data and command.
+Required property for mt2701:
+- mediatek,larbid :the hardware id of this larb.
+
Example:
larb1: larb@16010000 {
compatible = "mediatek,mt8173-smi-larb";
@@ -25,3 +28,15 @@ Example:
<&vdecsys CLK_VDEC_LARB_CKEN>;
clock-names = "apb", "smi";
};
+
+Example for mt2701:
+ larb0: larb@14010000 {
+ compatible = "mediatek,mt2701-smi-larb";
+ reg = <0 0x14010000 0 0x1000>;
+ mediatek,smi = <&smi_common>;
+ mediatek,larbid = <0>;
+ clocks = <&mmsys CLK_MM_SMI_LARB0>,
+ <&mmsys CLK_MM_SMI_LARB0>;
+ clock-names = "apb", "smi";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_DISP>;
+ };
--
2.6.4
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