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[PATCH 00/10] arm64: zynqmp: dtsi changes

Started byMichal Simek <michal.simek@xilinx.com>
First post2017-07-20 14:30 +0200
Last post2017-07-20 14:30 +0200
Articles 7 — 2 participants

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Contents

  [PATCH 00/10] arm64: zynqmp: dtsi changes Michal Simek <michal.simek@xilinx.com> - 2017-07-20 14:30 +0200
    [PATCH 01/10] arm64: zynqmp: Add references to cpu nodes Michal Simek <michal.simek@xilinx.com> - 2017-07-20 14:30 +0200
      Re: [PATCH 01/10] arm64: zynqmp: Add references to cpu nodes Moritz Fischer <mdf@kernel.org> - 2017-07-25 18:50 +0200
    [PATCH 06/10] arm64: zynqmp: Adding prefetchable memory space to pcie node Michal Simek <michal.simek@xilinx.com> - 2017-07-20 14:30 +0200
    [PATCH 10/10] arm64: zynqmp: Set status disabled in dtsi Michal Simek <michal.simek@xilinx.com> - 2017-07-20 14:30 +0200
    [PATCH 08/10] arm64: zynqmp: Correct IRQ nr for the SMMU Michal Simek <michal.simek@xilinx.com> - 2017-07-20 14:30 +0200
    [PATCH 07/10] arm64: zynqmp: Add support for RTC Michal Simek <michal.simek@xilinx.com> - 2017-07-20 14:30 +0200

#1692870 — [PATCH 00/10] arm64: zynqmp: dtsi changes

FromMichal Simek <michal.simek@xilinx.com>
Date2017-07-20 14:30 +0200
Subject[PATCH 00/10] arm64: zynqmp: dtsi changes
Message-ID<u5iKC-7kM-5@gated-at.bofh.it>
Hi,

I have cherry-picked all patches from xilinx soc vendor tree which are
ready for submission.
This patchset targets only zynqmp.dtsi which is shared with all zynqmp
families.

Thanks,
Michal


Bharat Kumar Gogada (1):
  arm64: zynqmp: Adding prefetchable memory space to pcie node

Edgar E. Iglesias (1):
  arm64: zynqmp: Correct IRQ nr for the SMMU

Michal Simek (5):
  arm64: zynqmp: Add references to cpu nodes
  arm64: zynqmp: Add dcc console for zynqmp
  arm64: zynqmp: Add CCI-400 node
  arm64: zynqmp: Add support for RTC
  arm64: zynqmp: Add new uartps compatible string

Naga Sureshkumar Relli (1):
  arm64: zynqmp: Set status disabled in dtsi

Shubhrajyoti Datta (1):
  arm64: zynqmp: Add operating points

Stefan Krsmanovic (1):
  arm64: zynqmp: Add idle state for ZynqMP

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 111 ++++++++++++++++++++++++++++-----
 1 file changed, 94 insertions(+), 17 deletions(-)

-- 
1.9.1

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#1692871 — [PATCH 01/10] arm64: zynqmp: Add references to cpu nodes

FromMichal Simek <michal.simek@xilinx.com>
Date2017-07-20 14:30 +0200
Subject[PATCH 01/10] arm64: zynqmp: Add references to cpu nodes
Message-ID<u5iKD-7kM-35@gated-at.bofh.it>
In reply to#1692870
Add missing references to all cpu nodes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 1a3f5e928bb9..4f7d9905e235 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -20,28 +20,28 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		cpu@0 {
+		cpu0: cpu@0 {
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x0>;
 		};
 
-		cpu@1 {
+		cpu1: cpu@1 {
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x1>;
 		};
 
-		cpu@2 {
+		cpu2: cpu@2 {
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
 			reg = <0x2>;
 		};
 
-		cpu@3 {
+		cpu3: cpu@3 {
 			compatible = "arm,cortex-a53", "arm,armv8";
 			device_type = "cpu";
 			enable-method = "psci";
-- 
1.9.1

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#1695945 — Re: [PATCH 01/10] arm64: zynqmp: Add references to cpu nodes

FromMoritz Fischer <mdf@kernel.org>
Date2017-07-25 18:50 +0200
SubjectRe: [PATCH 01/10] arm64: zynqmp: Add references to cpu nodes
Message-ID<u7bbY-5du-17@gated-at.bofh.it>
In reply to#1692871

[Multipart message — attachments visible in raw view] — view raw

On Thu, Jul 20, 2017 at 02:17:00PM +0200, Michal Simek wrote:
> Add missing references to all cpu nodes.
> 
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Moritz Fischer <mdf@kernel.org>
> ---
> 
>  arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 1a3f5e928bb9..4f7d9905e235 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -20,28 +20,28 @@
>  		#address-cells = <1>;
>  		#size-cells = <0>;
>  
> -		cpu@0 {
> +		cpu0: cpu@0 {
>  			compatible = "arm,cortex-a53", "arm,armv8";
>  			device_type = "cpu";
>  			enable-method = "psci";
>  			reg = <0x0>;
>  		};
>  
> -		cpu@1 {
> +		cpu1: cpu@1 {
>  			compatible = "arm,cortex-a53", "arm,armv8";
>  			device_type = "cpu";
>  			enable-method = "psci";
>  			reg = <0x1>;
>  		};
>  
> -		cpu@2 {
> +		cpu2: cpu@2 {
>  			compatible = "arm,cortex-a53", "arm,armv8";
>  			device_type = "cpu";
>  			enable-method = "psci";
>  			reg = <0x2>;
>  		};
>  
> -		cpu@3 {
> +		cpu3: cpu@3 {
>  			compatible = "arm,cortex-a53", "arm,armv8";
>  			device_type = "cpu";
>  			enable-method = "psci";
> -- 
> 1.9.1
>

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#1692872 — [PATCH 06/10] arm64: zynqmp: Adding prefetchable memory space to pcie node

FromMichal Simek <michal.simek@xilinx.com>
Date2017-07-20 14:30 +0200
Subject[PATCH 06/10] arm64: zynqmp: Adding prefetchable memory space to pcie node
Message-ID<u5iKE-7kM-41@gated-at.bofh.it>
In reply to#1692870
From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>

Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index f3968737e613..e7d1815c114b 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -285,12 +285,8 @@
 			      <0x0 0xfd480000 0x0 0x1000>,
 			      <0x80 0x00000000 0x0 0x1000000>;
 			reg-names = "breg", "pcireg", "cfg";
-			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000
-				  0xe0000000 0x00000000 0x10000000
-				  /* non-prefetchable memory */
-				  0x43000000 0x00000006 0x00000000 0x00000006
-				  0x00000000 0x00000002 0x00000000>;
-				  /* prefetchable memory */
+			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000	/* non-prefetchable memory */
+				  0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
 			bus-range = <0x00 0xff>;
 			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
-- 
1.9.1

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#1692873 — [PATCH 10/10] arm64: zynqmp: Set status disabled in dtsi

FromMichal Simek <michal.simek@xilinx.com>
Date2017-07-20 14:30 +0200
Subject[PATCH 10/10] arm64: zynqmp: Set status disabled in dtsi
Message-ID<u5iKE-7kM-43@gated-at.bofh.it>
In reply to#1692870
From: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>

Do not enable smmu via dtsi. Enable it in board file when needed.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 9304249a23ed..787463796348 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -339,6 +339,7 @@
 		smmu: smmu@fd800000 {
 			compatible = "arm,mmu-500";
 			reg = <0x0 0xfd800000 0x0 0x20000>;
+			status = "disabled";
 			#global-interrupts = <1>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 155 4>,
-- 
1.9.1

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#1692875 — [PATCH 08/10] arm64: zynqmp: Correct IRQ nr for the SMMU

FromMichal Simek <michal.simek@xilinx.com>
Date2017-07-20 14:30 +0200
Subject[PATCH 08/10] arm64: zynqmp: Correct IRQ nr for the SMMU
Message-ID<u5iKE-7kM-49@gated-at.bofh.it>
In reply to#1692870
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 1272fa6d4f99..4adf5285f56d 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -341,11 +341,11 @@
 			reg = <0x0 0xfd800000 0x0 0x20000>;
 			#global-interrupts = <1>;
 			interrupt-parent = <&gic>;
-			interrupts = <0 157 4>,
-				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
-				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
-				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>,
-				<0 157 4>, <0 157 4>, <0 157 4>, <0 157 4>;
+			interrupts = <0 155 4>,
+				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
+				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
+				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
+				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 		};
 
 		spi0: spi@ff040000 {
-- 
1.9.1

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#1692878 — [PATCH 07/10] arm64: zynqmp: Add support for RTC

FromMichal Simek <michal.simek@xilinx.com>
Date2017-07-20 14:30 +0200
Subject[PATCH 07/10] arm64: zynqmp: Add support for RTC
Message-ID<u5iKE-7kM-59@gated-at.bofh.it>
In reply to#1692870
Add support for RTC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index e7d1815c114b..1272fa6d4f99 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -300,6 +300,16 @@
 			};
 		};
 
+		rtc: rtc@ffa60000 {
+			compatible = "xlnx,zynqmp-rtc";
+			status = "disabled";
+			reg = <0x0 0xffa60000 0x0 0x100>;
+			interrupt-parent = <&gic>;
+			interrupts = <0 26 4>, <0 27 4>;
+			interrupt-names = "alarm", "sec";
+			calibration = <0x8000>;
+		};
+
 		sata: ahci@fd0c0000 {
 			compatible = "ceva,ahci-1v84";
 			status = "disabled";
-- 
1.9.1

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