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[PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation

Started byAleksandar Markovic <aleksandar.markovic@rt-rk.com>
First post2017-07-21 16:20 +0200
Last post2017-07-24 15:50 +0200
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  [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation Aleksandar Markovic <aleksandar.markovic@rt-rk.com> - 2017-07-21 16:20 +0200
    Re: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix  quiet NaN propagation James Hogan <james.hogan@imgtec.com> - 2017-07-21 16:50 +0200
      RE: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix  quiet NaN propagation Aleksandar Markovic <Aleksandar.Markovic@imgtec.com> - 2017-07-24 15:40 +0200
        Re: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix  quiet NaN propagation James Hogan <james.hogan@imgtec.com> - 2017-07-24 15:50 +0200

#1693725 — [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation

FromAleksandar Markovic <aleksandar.markovic@rt-rk.com>
Date2017-07-21 16:20 +0200
Subject[PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
Message-ID<u5GWB-5Tl-1@gated-at.bofh.it>
From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S>, if both inputs
are quiet NaNs. The specifications of <MAX|MAXA|MIN|MINA>.<D|S> state
that the returned value in such cases should be the quiet NaN
contained in register fs.

The relevant example:

MAX.S fd,fs,ft:
  If fs contains qNaN1, and ft contains qNaN2, fd is going to contain
  qNaN1 (without this patch, it used to contain qNaN2).

Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
---
 arch/mips/math-emu/dp_fmax.c | 8 ++++++--
 arch/mips/math-emu/dp_fmin.c | 8 ++++++--
 arch/mips/math-emu/sp_fmax.c | 8 ++++++--
 arch/mips/math-emu/sp_fmin.c | 8 ++++++--
 4 files changed, 24 insertions(+), 8 deletions(-)

diff --git a/arch/mips/math-emu/dp_fmax.c b/arch/mips/math-emu/dp_fmax.c
index fd71b8d..567fc33 100644
--- a/arch/mips/math-emu/dp_fmax.c
+++ b/arch/mips/math-emu/dp_fmax.c
@@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754dp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
@@ -147,6 +149,9 @@ union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754dp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -154,7 +159,6 @@ union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
diff --git a/arch/mips/math-emu/dp_fmin.c b/arch/mips/math-emu/dp_fmin.c
index c1072b0..77f7ca9 100644
--- a/arch/mips/math-emu/dp_fmin.c
+++ b/arch/mips/math-emu/dp_fmin.c
@@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754dp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
@@ -147,6 +149,9 @@ union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754dp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -154,7 +159,6 @@ union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
diff --git a/arch/mips/math-emu/sp_fmax.c b/arch/mips/math-emu/sp_fmax.c
index 4d00084..d46e8e4 100644
--- a/arch/mips/math-emu/sp_fmax.c
+++ b/arch/mips/math-emu/sp_fmax.c
@@ -47,6 +47,9 @@ union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754sp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -54,7 +57,6 @@ union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
@@ -147,6 +149,9 @@ union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754sp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -154,7 +159,6 @@ union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
diff --git a/arch/mips/math-emu/sp_fmin.c b/arch/mips/math-emu/sp_fmin.c
index 4eb1bb9..b528c4b 100644
--- a/arch/mips/math-emu/sp_fmin.c
+++ b/arch/mips/math-emu/sp_fmin.c
@@ -47,6 +47,9 @@ union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754sp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -54,7 +57,6 @@ union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
@@ -147,6 +149,9 @@ union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 		return ieee754sp_nanxcpt(x);
 
+	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
+		return x;
+
 	/* numbers are preferred to NaNs */
 	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
@@ -154,7 +159,6 @@ union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y)
 	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 		return x;
 
-	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
-- 
2.7.4

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#1693762 — Re: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation

FromJames Hogan <james.hogan@imgtec.com>
Date2017-07-21 16:50 +0200
SubjectRe: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
Message-ID<u5HpE-62U-23@gated-at.bofh.it>
In reply to#1693725

[Multipart message — attachments visible in raw view] — view raw

On Fri, Jul 21, 2017 at 04:09:03PM +0200, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
> 
> Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S>, if both inputs
> are quiet NaNs. The specifications of <MAX|MAXA|MIN|MINA>.<D|S> state
> that the returned value in such cases should be the quiet NaN
> contained in register fs.
> 
> The relevant example:
> 
> MAX.S fd,fs,ft:
>   If fs contains qNaN1, and ft contains qNaN2, fd is going to contain
>   qNaN1 (without this patch, it used to contain qNaN2).
> 

Consider adding:

Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction")
Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction")

> Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
> Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>

Consider adding:

Cc: <stable@vger.kernel.org> # 4.3+

> ---
>  arch/mips/math-emu/dp_fmax.c | 8 ++++++--
>  arch/mips/math-emu/dp_fmin.c | 8 ++++++--
>  arch/mips/math-emu/sp_fmax.c | 8 ++++++--
>  arch/mips/math-emu/sp_fmin.c | 8 ++++++--
>  4 files changed, 24 insertions(+), 8 deletions(-)
> 
> diff --git a/arch/mips/math-emu/dp_fmax.c b/arch/mips/math-emu/dp_fmax.c
> index fd71b8d..567fc33 100644
> --- a/arch/mips/math-emu/dp_fmax.c
> +++ b/arch/mips/math-emu/dp_fmax.c
> @@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754dp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;

couldn't the above...

> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)

... go somewhere around here and fall through to the existing return x
case?

and same below of course.

Otherwise:
Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James



>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> @@ -147,6 +149,9 @@ union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754dp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -154,7 +159,6 @@ union ieee754dp ieee754dp_fmaxa(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> diff --git a/arch/mips/math-emu/dp_fmin.c b/arch/mips/math-emu/dp_fmin.c
> index c1072b0..77f7ca9 100644
> --- a/arch/mips/math-emu/dp_fmin.c
> +++ b/arch/mips/math-emu/dp_fmin.c
> @@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754dp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmin(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> @@ -147,6 +149,9 @@ union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754dp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -154,7 +159,6 @@ union ieee754dp ieee754dp_fmina(union ieee754dp x, union ieee754dp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> diff --git a/arch/mips/math-emu/sp_fmax.c b/arch/mips/math-emu/sp_fmax.c
> index 4d00084..d46e8e4 100644
> --- a/arch/mips/math-emu/sp_fmax.c
> +++ b/arch/mips/math-emu/sp_fmax.c
> @@ -47,6 +47,9 @@ union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754sp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -54,7 +57,6 @@ union ieee754sp ieee754sp_fmax(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> @@ -147,6 +149,9 @@ union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754sp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -154,7 +159,6 @@ union ieee754sp ieee754sp_fmaxa(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> diff --git a/arch/mips/math-emu/sp_fmin.c b/arch/mips/math-emu/sp_fmin.c
> index 4eb1bb9..b528c4b 100644
> --- a/arch/mips/math-emu/sp_fmin.c
> +++ b/arch/mips/math-emu/sp_fmin.c
> @@ -47,6 +47,9 @@ union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754sp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -54,7 +57,6 @@ union ieee754sp ieee754sp_fmin(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> @@ -147,6 +149,9 @@ union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
>  		return ieee754sp_nanxcpt(x);
>  
> +	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> +		return x;
> +
>  	/* numbers are preferred to NaNs */
>  	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> @@ -154,7 +159,6 @@ union ieee754sp ieee754sp_fmina(union ieee754sp x, union ieee754sp y)
>  	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
>  		return x;
>  
> -	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
>  	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
> -- 
> 2.7.4
>

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#1694727 — RE: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation

FromAleksandar Markovic <Aleksandar.Markovic@imgtec.com>
Date2017-07-24 15:40 +0200
SubjectRE: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
Message-ID<u6LKz-5uV-43@gated-at.bofh.it>
In reply to#1693762
Hi, James,

I appreciate your thorough and expeditious review.

> 
> ________________________________________
> From: James Hogan
> Sent: Friday, July 21, 2017 7:45 AM
> To: Aleksandar Markovic
> Cc: linux-mips@linux-mips.org; Aleksandar Markovic; Miodrag Dinic; Goran Ferenc; Douglas Leung; linux-kernel@vger.kernel.org; Paul Burton; Petar Jovanovic; Raghu Gandham; Ralf Baechle
> Subject: Re: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
> 
> On Fri, Jul 21, 2017 at 04:09:03PM +0200, Aleksandar Markovic wrote:
> > From: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
> >
> > Fix the value returned by <MAX|MAXA|MIN|MINA>.<D|S>, if both inputs
> > are quiet NaNs. The specifications of <MAX|MAXA|MIN|MINA>.<D|S> state
> > that the returned value in such cases should be the quiet NaN
> > contained in register fs.
> >
> > The relevant example:
> >
> > MAX.S fd,fs,ft:
> >   If fs contains qNaN1, and ft contains qNaN2, fd is going to contain
> >   qNaN1 (without this patch, it used to contain qNaN2).
> >
> 
> Consider adding:
> 
> Fixes: a79f5f9ba508 ("MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction")
> Fixes: 4e9561b20e2f ("MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction")
> 

Will add in v4 (for all MIN/MAX/MINA/MAXa patches).

> > Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com>
> > Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com>
> > Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com>
> 
> Consider adding:
> 
> Cc: <stable@vger.kernel.org> # 4.3+

Will add on v4 (for all MIN/MAX/MINA/MAXA patches).

> > ---
> >  arch/mips/math-emu/dp_fmax.c | 8 ++++++--
> >  arch/mips/math-emu/dp_fmin.c | 8 ++++++--
> >  arch/mips/math-emu/sp_fmax.c | 8 ++++++--
> >  arch/mips/math-emu/sp_fmin.c | 8 ++++++--
> >  4 files changed, 24 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/mips/math-emu/dp_fmax.c b/arch/mips/math-emu/dp_fmax.c
> > index fd71b8d..567fc33 100644
> > --- a/arch/mips/math-emu/dp_fmax.c
> > +++ b/arch/mips/math-emu/dp_fmax.c
> > @@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
> >       case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
> >               return ieee754dp_nanxcpt(x);
> >
> > +     case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> > +             return x;
> 
> couldn't the above...
> 
> > +
> >       /* numbers are preferred to NaNs */
> >       case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
> >       case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> > @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
> 
> ... go somewhere around here and fall through to the existing return x
> case?
> 

It could, but at the expense of code clarity and/or logical grouping of special cases,
which after this patch looks like:

               . . .
                 |
  case of both inputs qNaN
                 |
  case of only x input qNaN
                 |
  case of only y input qNaN
                 |
               . . .

If you agree, I suggest keeping the code the same as currently proposed in
this patch, except that the following comments should be added in appropriate
places:

	/*
	 * Quiet NaN handling
	 */
	/* The case of both inputs quiet NaNs */
   . . .
	/* The cases of exactly one input quiet NaN */

Unfortunately, the code segment for handling of sNaN and infinity inputs do
not follow the organization that I proposed. However, I think that my proposal
for case organization is the superior one - therefore I intend to keep it in v4,
unless you tell me not to do so.

Regards,
Aleksandar

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#1694734 — Re: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation

FromJames Hogan <james.hogan@imgtec.com>
Date2017-07-24 15:50 +0200
SubjectRe: [PATCH v3 05/16] MIPS: math-emu: <MAX|MAXA|MIN|MINA>.<D|S>: Fix quiet NaN propagation
Message-ID<u6LUd-5yD-3@gated-at.bofh.it>
In reply to#1694727

[Multipart message — attachments visible in raw view] — view raw

Hi Aleksandar,

On Mon, Jul 24, 2017 at 02:36:05PM +0100, Aleksandar Markovic wrote:
> > > diff --git a/arch/mips/math-emu/dp_fmax.c b/arch/mips/math-emu/dp_fmax.c
> > > index fd71b8d..567fc33 100644
> > > --- a/arch/mips/math-emu/dp_fmax.c
> > > +++ b/arch/mips/math-emu/dp_fmax.c
> > > @@ -47,6 +47,9 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
> > >       case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
> > >               return ieee754dp_nanxcpt(x);
> > >
> > > +     case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
> > > +             return x;
> > 
> > couldn't the above...
> > 
> > > +
> > >       /* numbers are preferred to NaNs */
> > >       case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
> > >       case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
> > > @@ -54,7 +57,6 @@ union ieee754dp ieee754dp_fmax(union ieee754dp x, union ieee754dp y)
> > 
> > ... go somewhere around here and fall through to the existing return x
> > case?
> > 
> 
> It could, but at the expense of code clarity and/or logical grouping of special cases,
> which after this patch looks like:
> 
>                . . .
>                  |
>   case of both inputs qNaN
>                  |
>   case of only x input qNaN
>                  |
>   case of only y input qNaN
>                  |
>                . . .
> 
> If you agree, I suggest keeping the code the same as currently proposed in
> this patch, except that the following comments should be added in appropriate
> places:
> 
> 	/*
> 	 * Quiet NaN handling
> 	 */
> 	/* The case of both inputs quiet NaNs */
>    . . .
> 	/* The cases of exactly one input quiet NaN */
> 
> Unfortunately, the code segment for handling of sNaN and infinity inputs do
> not follow the organization that I proposed. However, I think that my proposal
> for case organization is the superior one - therefore I intend to keep it in v4,
> unless you tell me not to do so.

Okay, I don't object.

Thanks
James

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