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Re: [PATCH v3 0/9] add support for Sama5d2 audio PLLs and enable ClassD

Started byQuentin Schulz <quentin.schulz@free-electrons.com>
First post2017-07-19 08:30 +0200
Last post2017-07-19 12:30 +0200
Articles 2 — 2 participants

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  Re: [PATCH v3 0/9] add support for Sama5d2 audio PLLs and enable  ClassD Quentin Schulz <quentin.schulz@free-electrons.com> - 2017-07-19 08:30 +0200
    Re: [PATCH v3 0/9] add support for Sama5d2 audio PLLs and enable  ClassD Mark Brown <broonie@kernel.org> - 2017-07-19 12:30 +0200

#1691014 — Re: [PATCH v3 0/9] add support for Sama5d2 audio PLLs and enable ClassD

FromQuentin Schulz <quentin.schulz@free-electrons.com>
Date2017-07-19 08:30 +0200
SubjectRe: [PATCH v3 0/9] add support for Sama5d2 audio PLLs and enable ClassD
Message-ID<u4QEG-4FE-19@gated-at.bofh.it>
Hi all,

It's been almost a week with no comments on this patch set, so kindly
pinging.

Thanks,
Quentin

On 13/07/2017 09:49, Quentin Schulz wrote:
> This patch series adds support for the audio PLLs and enables ClassD that
> can be found in ATMEL Sama5d2 SoC.
> 
> There are two audio PLLs (PMC and PAD) that shares the same parent (FRAC).
> FRAC can output between 620 and 700MHz and only multiply the rate of its
> parent. The two audio PLLs then divide the FRAC rate to best match the
> asked rate.
> 
> I basically took an old patch series posted by Nicolas on December, 6th
> 2016[1][2][3] and the comments Boris did on the first version[4] Nicolas
> sent on July, 15th 2015.
> 
> I also fixed the function used to compute the divisors, removed useless
> spinlocks and added a range to the audio frac PLL to stay within vendor's
> supported range. Clocks that are children of gclk (generated-clk) are now
> able to propagate rate to the audio PLL clocks when needed.
> 
> However, there are multiple children clocks that could technically
> change the rate of audio_pll (via gck). With the rate locking introduced
> in Jerome Brunet's patch series[5], the first consumer to enable the clock
> will be the one definitely setting the rate of the clock. Without the rate
> locking, the last consumer to set the rate will be able to mess with the
> rate.
> Since audio IPs are most likely to request the same rate, we enforce
> that the only clks able to modify gck rate are those of audio IPs.
> 
> To remain consistent, we deny other clocks to be children of audio_pll.
> 
> Thanks,
> Quentin
> 
> [1] https://patchwork.kernel.org/patch/9462351/
> [2] https://patchwork.kernel.org/patch/9462347/
> [3] https://patchwork.kernel.org/patch/9462349/
> [4] https://www.spinics.net/lists/arm-kernel/msg436120.html
> [5] http://www.spinics.net/lists/linux-clk/msg17927.html
> 
> Cyrille Pitchen (2):
>   ARM: dts: at91: sama5d2: add classd nodes
>   ARM: dts: at91: sama5d2_xplained: add pin muxing and enable classd
> 
> Quentin Schulz (7):
>   clk: at91: clk-generated: remove useless divisor loop
>   clk: at91: add audio plls to the compatible list in DT binding
>   clk: at91: add audio pll clock drivers
>   clk: at91: clk-generated: create function to find best_diff
>   clk: at91: clk-generated: make gclk determine audio_pll rate
>   ASoC: atmel-classd: remove aclk clock from DT binding
>   ASoC: atmel-classd: remove aclk clock
> 
>  .../devicetree/bindings/clock/at91-clock.txt       |  10 +
>  .../devicetree/bindings/sound/atmel-classd.txt     |   9 +-
>  arch/arm/boot/dts/at91-sama5d2_xplained.dts        |  16 ++
>  arch/arm/boot/dts/sama5d2.dtsi                     |  39 +++-
>  arch/arm/mach-at91/Kconfig                         |   4 +
>  drivers/clk/at91/Makefile                          |   2 +
>  drivers/clk/at91/clk-audio-pll-pad.c               | 206 ++++++++++++++++++
>  drivers/clk/at91/clk-audio-pll-pmc.c               | 174 +++++++++++++++
>  drivers/clk/at91/clk-audio-pll.c                   | 239 +++++++++++++++++++++
>  drivers/clk/at91/clk-generated.c                   | 101 +++++++--
>  include/linux/clk/at91_pmc.h                       |  25 +++
>  sound/soc/atmel/atmel-classd.c                     |  47 ++--
>  12 files changed, 813 insertions(+), 59 deletions(-)
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pad.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll-pmc.c
>  create mode 100644 drivers/clk/at91/clk-audio-pll.c
> 

-- 
Quentin Schulz, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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#1691372

FromMark Brown <broonie@kernel.org>
Date2017-07-19 12:30 +0200
Message-ID<u4UoW-7eW-39@gated-at.bofh.it>
In reply to#1691014

[Multipart message — attachments visible in raw view] — view raw

On Wed, Jul 19, 2017 at 08:28:17AM +0200, Quentin Schulz wrote:
> Hi all,
> 
> It's been almost a week with no comments on this patch set, so kindly
> pinging.

Please don't top post, reply in line with needed context.  This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.

Please don't send content free pings and please allow a reasonable time
for review.  People get busy, go on holiday, attend conferences and so 
on so unless there is some reason for urgency (like critical bug fixes)
please allow at least a couple of weeks for review.  If there have been
review comments then people may be waiting for those to be addressed.

Sending content free pings adds to the mail volume (if they are seen at
all) which is often the problem and since they can't be reviewed
directly if something has gone wrong you'll have to resend the patches
anyway, though there are some other maintainers who like them - if in
doubt look at how patches for the subsystem are normally handled.

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