Groups | Search | Server Info | Keyboard shortcuts | Login | Register [http] [https] [nntp] [nntps]
Groups > linux.kernel > #1688558 > unrolled thread
| Started by | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| First post | 2017-07-17 01:10 +0200 |
| Last post | 2017-07-17 01:10 +0200 |
| Articles | 4 — 2 participants |
Back to article view | Back to linux.kernel
[PATCH 0/8] 5-level paging enabling for v4.14 "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-07-17 01:10 +0200
[PATCH 3/8] x86/xen: Redefine XEN_ELFNOTE_INIT_P2M using PUD_SIZE * PTRS_PER_PUD "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-07-17 01:10 +0200
Re: [PATCH 3/8] x86/xen: Redefine XEN_ELFNOTE_INIT_P2M using PUD_SIZE * PTRS_PER_PUD Juergen Gross <jgross@suse.com> - 2017-07-17 07:50 +0200
[PATCH 1/8] x86/dump_pagetables: Generalize address normalization "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> - 2017-07-17 01:10 +0200
| From | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| Date | 2017-07-17 01:10 +0200 |
| Subject | [PATCH 0/8] 5-level paging enabling for v4.14 |
| Message-ID | <u40PL-5t4-3@gated-at.bofh.it> |
Hi, As Ingo requested, I'm resending the rebased patchset after merge window to be queued for v4.14. The patches was reordered and few more fixes added: for Xen and dump_pagetables. Please consider applying. Kirill A. Shutemov (8): x86/dump_pagetables: Generalize address normalization x86/dump_pagetables: Fix printout of p4d level x86/xen: Redefine XEN_ELFNOTE_INIT_P2M using PUD_SIZE * PTRS_PER_PUD x86/mm: Rename tasksize_32bit/64bit to task_size_32bit/64bit x86/mpx: Do not allow MPX if we have mappings above 47-bit x86/mm: Prepare to expose larger address space to userspace x86/mm: Allow userspace have mapping above 47-bit x86: Enable 5-level paging support Documentation/x86/x86_64/5level-paging.txt | 64 ++++++++++++++++++++++++++++++ arch/x86/Kconfig | 18 +++++++++ arch/x86/include/asm/elf.h | 4 +- arch/x86/include/asm/mpx.h | 9 +++++ arch/x86/include/asm/processor.h | 12 ++++-- arch/x86/kernel/sys_x86_64.c | 30 ++++++++++++-- arch/x86/mm/dump_pagetables.c | 29 +++++++------- arch/x86/mm/hugetlbpage.c | 27 +++++++++++-- arch/x86/mm/mmap.c | 12 +++--- arch/x86/mm/mpx.c | 33 ++++++++++++++- arch/x86/xen/Kconfig | 5 +++ arch/x86/xen/xen-head.S | 2 +- 12 files changed, 210 insertions(+), 35 deletions(-) create mode 100644 Documentation/x86/x86_64/5level-paging.txt -- 2.11.0
[toc] | [next] | [standalone]
| From | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| Date | 2017-07-17 01:10 +0200 |
| Subject | [PATCH 3/8] x86/xen: Redefine XEN_ELFNOTE_INIT_P2M using PUD_SIZE * PTRS_PER_PUD |
| Message-ID | <u40PN-5t4-43@gated-at.bofh.it> |
| In reply to | #1688558 |
XEN_ELFNOTE_INIT_P2M has to be 512GB for both 4- and 5-level paging. (PUD_SIZE * PTRS_PER_PUD) would do this. Unfortunately, we cannot use P4D_SIZE, which would fit here. With current headers structure it cannot be used in assembly, if p4d level is folded. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> --- arch/x86/xen/xen-head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S index 72a8e6adebe6..a7525e95d53f 100644 --- a/arch/x86/xen/xen-head.S +++ b/arch/x86/xen/xen-head.S @@ -58,7 +58,7 @@ ENTRY(hypercall_page) #else ELFNOTE(Xen, XEN_ELFNOTE_VIRT_BASE, _ASM_PTR __START_KERNEL_map) /* Map the p2m table to a 512GB-aligned user address. */ - ELFNOTE(Xen, XEN_ELFNOTE_INIT_P2M, .quad PGDIR_SIZE) + ELFNOTE(Xen, XEN_ELFNOTE_INIT_P2M, .quad (PUD_SIZE * PTRS_PER_PUD)) #endif #ifdef CONFIG_XEN_PV ELFNOTE(Xen, XEN_ELFNOTE_ENTRY, _ASM_PTR startup_xen) -- 2.11.0
[toc] | [prev] | [next] | [standalone]
| From | Juergen Gross <jgross@suse.com> |
|---|---|
| Date | 2017-07-17 07:50 +0200 |
| Subject | Re: [PATCH 3/8] x86/xen: Redefine XEN_ELFNOTE_INIT_P2M using PUD_SIZE * PTRS_PER_PUD |
| Message-ID | <u474S-Uc-19@gated-at.bofh.it> |
| In reply to | #1688559 |
On 17/07/17 00:59, Kirill A. Shutemov wrote: > XEN_ELFNOTE_INIT_P2M has to be 512GB for both 4- and 5-level paging. > (PUD_SIZE * PTRS_PER_PUD) would do this. > > Unfortunately, we cannot use P4D_SIZE, which would fit here. With > current headers structure it cannot be used in assembly, if p4d > level is folded. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Reviewed-by: Juergen Gross <jgross@suse.com> Thanks, Juergen
[toc] | [prev] | [next] | [standalone]
| From | "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> |
|---|---|
| Date | 2017-07-17 01:10 +0200 |
| Subject | [PATCH 1/8] x86/dump_pagetables: Generalize address normalization |
| Message-ID | <u40PN-5t4-41@gated-at.bofh.it> |
| In reply to | #1688558 |
Modify normalize_addr to handle different sizes of virtual address
space.
It's preparation for enabling 5-level paging.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
---
arch/x86/mm/dump_pagetables.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index 0470826d2bdc..a824d575bb84 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -188,11 +188,12 @@ static void printk_prot(struct seq_file *m, pgprot_t prot, int level, bool dmsg)
*/
static unsigned long normalize_addr(unsigned long u)
{
-#ifdef CONFIG_X86_64
- return (signed long)(u << 16) >> 16;
-#else
- return u;
-#endif
+ int shift;
+ if (!IS_ENABLED(CONFIG_X86_64))
+ return u;
+
+ shift = 64 - (__VIRTUAL_MASK_SHIFT + 1);
+ return (signed long)(u << shift) >> shift;
}
/*
--
2.11.0
[toc] | [prev] | [standalone]
Back to top | Article view | linux.kernel
csiph-web