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Re: [PATCH v1 1/1] gpio: gpio-crystalcove: Skip IRQ CTRL register update for virtual GPIOs

Started bysathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
First post2017-07-11 01:40 +0200
Last post2017-07-11 19:30 +0200
Articles 3 — 3 participants

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  Re: [PATCH v1 1/1] gpio: gpio-crystalcove: Skip IRQ CTRL register  update for virtual GPIOs sathyanarayanan kuppuswamy          <sathyanarayanan.kuppuswamy@linux.intel.com> - 2017-07-11 01:40 +0200
    Re: [PATCH v1 1/1] gpio: gpio-crystalcove: Skip IRQ CTRL register  update for virtual GPIOs Hans de Goede <hdegoede@redhat.com> - 2017-07-11 11:50 +0200
      Re: [PATCH v1 1/1] gpio: gpio-crystalcove: Skip IRQ CTRL register  update for virtual GPIOs "Kuppuswamy, Sathyanarayanan" <sathyaosid@gmail.com> - 2017-07-11 19:30 +0200

#1684692 — Re: [PATCH v1 1/1] gpio: gpio-crystalcove: Skip IRQ CTRL register update for virtual GPIOs

Fromsathyanarayanan kuppuswamy <sathyanarayanan.kuppuswamy@linux.intel.com>
Date2017-07-11 01:40 +0200
SubjectRe: [PATCH v1 1/1] gpio: gpio-crystalcove: Skip IRQ CTRL register update for virtual GPIOs
Message-ID<u1Qrv-35f-5@gated-at.bofh.it>
Hi Hans,

Do you have any comments on this patch ? It kind of fixes your patch, so 
would prefer to get your comments.


On 06/15/2017 02:45 PM, sathyanarayanan kuppuswamy wrote:
> Hi Andy,
>
>
> On 06/15/2017 02:19 AM, Andy Shevchenko wrote:
>> On Thu, Jun 15, 2017 at 2:21 AM,
>> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>>> From: Kuppuswamy Sathyanarayanan 
>>> <sathyanarayanan.kuppuswamy@linux.intel.com>
>>>
>>> Commit 9a752b4c9ab9 ("gpio: crystalcove: Do not write regular gpio
>>> registers for virtual GPIOs") added support to skip GPIO register
>>> update for virtual GPIOs, but it missed to add skip logic in
>>> crystalcove_update_irq_ctrl() function. This patch fixes it.
>>> @@ -134,6 +134,9 @@ static void crystalcove_update_irq_ctrl(struct 
>>> crystalcove_gpio *cg, int gpio)
>>>   {
>>>          int reg = to_reg(gpio, CTRL_IN);
>>>
>>> +       if (reg < 0)
>>> +               return;
>>> +
>>>          regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, 
>>> cg->intcnt_value);
>>>   }
>> Shouldn't it have been done using irq_valid_mask flag in the first 
>> place?
> Agree. Setting irq_valid_mask would be the proper approach to skip IRQ 
> for some GPIO pins. But commit 9a752b4c9ab9 added the GPIO index based 
> checks in other IRQ set/unset functions in this driver and missed to 
> add it only in this update_irq_ctrl() function. May be I can submit a 
> separate patch to clean it up and use logic based on setting 
> irq_valid_mask.
>
> Even if we do the cleanup patch, I would still prefer to have this 
> check. Since to_reg() can return value < 0, its good to check it 
> before passing it to regmap_* functions. Let me know your comments.
>
>>
>

-- 
Sathyanarayanan Kuppuswamy
Linux kernel developer

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#1684926

FromHans de Goede <hdegoede@redhat.com>
Date2017-07-11 11:50 +0200
Message-ID<u1ZXQ-zq-5@gated-at.bofh.it>
In reply to#1684692
Hi,

On 11-07-17 01:35, sathyanarayanan kuppuswamy wrote:
> Hi Hans,
> 
> Do you have any comments on this patch ? It kind of fixes your patch, so would prefer to get your comments.

Sorry I did not notice this patch before, did you Cc me ?

As for the patch, I deliberately did not add the check
to crystalcove_update_irq_ctrl, crystalcove_update_irq_ctrl
only gets called from crystalcove_bus_sync_unlock if
UPDATE_IRQ_TYPE

UPDATE_IRQ_TYPE only gets set from crystalcove_irq_type
which at the top contains:

         if (data->hwirq >= CRYSTALCOVE_GPIO_NUM)
                 return 0;

So crystalcove_update_irq_ctrl will never get called for
virtual GPIOs.

TL;DR: your patch is not necessary.

Regards,

Hans


> 
> 
> On 06/15/2017 02:45 PM, sathyanarayanan kuppuswamy wrote:
>> Hi Andy,
>>
>>
>> On 06/15/2017 02:19 AM, Andy Shevchenko wrote:
>>> On Thu, Jun 15, 2017 at 2:21 AM,
>>> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>>>> From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
>>>>
>>>> Commit 9a752b4c9ab9 ("gpio: crystalcove: Do not write regular gpio
>>>> registers for virtual GPIOs") added support to skip GPIO register
>>>> update for virtual GPIOs, but it missed to add skip logic in
>>>> crystalcove_update_irq_ctrl() function. This patch fixes it.
>>>> @@ -134,6 +134,9 @@ static void crystalcove_update_irq_ctrl(struct crystalcove_gpio *cg, int gpio)
>>>>   {
>>>>          int reg = to_reg(gpio, CTRL_IN);
>>>>
>>>> +       if (reg < 0)
>>>> +               return;
>>>> +
>>>>          regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, cg->intcnt_value);
>>>>   }
>>> Shouldn't it have been done using irq_valid_mask flag in the first place?
>> Agree. Setting irq_valid_mask would be the proper approach to skip IRQ for some GPIO pins. But commit 9a752b4c9ab9 added the GPIO index based checks in other IRQ set/unset functions in this driver and missed to add it only in this update_irq_ctrl() function. May be I can submit a separate patch to clean it up and use logic based on setting irq_valid_mask.
>>
>> Even if we do the cleanup patch, I would still prefer to have this check. Since to_reg() can return value < 0, its good to check it before passing it to regmap_* functions. Let me know your comments.
>>
>>>
>>
> 

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#1685238

From"Kuppuswamy, Sathyanarayanan" <sathyaosid@gmail.com>
Date2017-07-11 19:30 +0200
Message-ID<u2790-5cu-27@gated-at.bofh.it>
In reply to#1684926
Hi Hans,


On 7/11/2017 2:47 AM, Hans de Goede wrote:
> Hi,
>
> On 11-07-17 01:35, sathyanarayanan kuppuswamy wrote:
>> Hi Hans,
>>
>> Do you have any comments on this patch ? It kind of fixes your patch, 
>> so would prefer to get your comments.
>
> Sorry I did not notice this patch before, did you Cc me ?
>
> As for the patch, I deliberately did not add the check
> to crystalcove_update_irq_ctrl, crystalcove_update_irq_ctrl
> only gets called from crystalcove_bus_sync_unlock if
> UPDATE_IRQ_TYPE
>
> UPDATE_IRQ_TYPE only gets set from crystalcove_irq_type
> which at the top contains:
>
>         if (data->hwirq >= CRYSTALCOVE_GPIO_NUM)
>                 return 0;
>
> So crystalcove_update_irq_ctrl will never get called for
> virtual GPIOs.
>
> TL;DR: your patch is not necessary.
Thanks for the clarification.
>
> Regards,
>
> Hans
>
>
>>
>>
>> On 06/15/2017 02:45 PM, sathyanarayanan kuppuswamy wrote:
>>> Hi Andy,
>>>
>>>
>>> On 06/15/2017 02:19 AM, Andy Shevchenko wrote:
>>>> On Thu, Jun 15, 2017 at 2:21 AM,
>>>> <sathyanarayanan.kuppuswamy@linux.intel.com> wrote:
>>>>> From: Kuppuswamy Sathyanarayanan 
>>>>> <sathyanarayanan.kuppuswamy@linux.intel.com>
>>>>>
>>>>> Commit 9a752b4c9ab9 ("gpio: crystalcove: Do not write regular gpio
>>>>> registers for virtual GPIOs") added support to skip GPIO register
>>>>> update for virtual GPIOs, but it missed to add skip logic in
>>>>> crystalcove_update_irq_ctrl() function. This patch fixes it.
>>>>> @@ -134,6 +134,9 @@ static void crystalcove_update_irq_ctrl(struct 
>>>>> crystalcove_gpio *cg, int gpio)
>>>>>   {
>>>>>          int reg = to_reg(gpio, CTRL_IN);
>>>>>
>>>>> +       if (reg < 0)
>>>>> +               return;
>>>>> +
>>>>>          regmap_update_bits(cg->regmap, reg, CTLI_INTCNT_BE, 
>>>>> cg->intcnt_value);
>>>>>   }
>>>> Shouldn't it have been done using irq_valid_mask flag in the first 
>>>> place?
>>> Agree. Setting irq_valid_mask would be the proper approach to skip 
>>> IRQ for some GPIO pins. But commit 9a752b4c9ab9 added the GPIO index 
>>> based checks in other IRQ set/unset functions in this driver and 
>>> missed to add it only in this update_irq_ctrl() function. May be I 
>>> can submit a separate patch to clean it up and use logic based on 
>>> setting irq_valid_mask.
>>>
>>> Even if we do the cleanup patch, I would still prefer to have this 
>>> check. Since to_reg() can return value < 0, its good to check it 
>>> before passing it to regmap_* functions. Let me know your comments.
>>>
>>>>
>>>
>>

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