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| Started by | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| First post | 2017-04-20 08:50 +0200 |
| Last post | 2017-04-20 08:50 +0200 |
| Articles | 1 — 1 participant |
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Re: [PATCH v2 3/3] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 Mikko Perttunen <cyndis@kapsi.fi> - 2017-04-20 08:50 +0200
| From | Mikko Perttunen <cyndis@kapsi.fi> |
|---|---|
| Date | 2017-04-20 08:50 +0200 |
| Subject | Re: [PATCH v2 3/3] arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186 |
| Message-ID | <tye4F-5xb-3@gated-at.bofh.it> |
On 04.04.2017 16:43, Mikko Perttunen wrote:
> The Tegra186 CCPLEX_CLUSTER area contains memory-mapped
> registers that initiate CPU frequency/voltage transitions.
>
> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
> ---
> v2:
> - Only one regs entry
>
> arch/arm64/boot/dts/nvidia/tegra186.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> index 3ea5e6369bc3..c023af0be43d 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
> @@ -347,6 +347,13 @@
> reg-names = "pmc", "wake", "aotag", "scratch";
> };
>
> + ccplex@e000000 {
> + compatible = "nvidia,tegra186-ccplex-cluster";
> + reg = <0x0 0x0e000000 0x0 0x3fffff>;
> +
> + nvidia,bpmp = <&bpmp>;
> + };
> +
> sysram@30000000 {
> compatible = "nvidia,tegra186-sysram", "mmio-sram";
> reg = <0x0 0x30000000 0x0 0x50000>;
>
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